32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Xinyun Liu <xinyun.liu@intel.com>
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Date: Mon, 29 Oct 2018 10:02:48 +0800
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Subject: [PATCH] drm/i915/gvt: not to touch undefined MOCS registers
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Some engines are not available for all Gens, so need to add check before
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access them.
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Tracked-On: projectacrn/acrn-hypervisor#1581
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Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
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Signed-off-by: Yakui Zhao <Yakui.Zhao@intel.com>
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---
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drivers/gpu/drm/i915/gvt/mmio_context.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
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index dc0a14729b88..4e99cd0e4fbe 100644
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--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
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+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
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@@ -171,6 +171,8 @@ static void load_render_mocs(struct drm_i915_private *dev_priv)
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int ring_id, i;
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for (ring_id = 0; ring_id < ARRAY_SIZE(regs); ring_id++) {
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+ if (!HAS_ENGINE(dev_priv, ring_id))
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+ continue;
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offset.reg = regs[ring_id];
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for (i = 0; i < GEN9_MOCS_SIZE; i++) {
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gen9_render_mocs.control_table[ring_id][i] =
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--
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https://clearlinux.org
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