138 lines
4.6 KiB
Diff
138 lines
4.6 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Zhao Yakui <yakui.zhao@intel.com>
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Date: Tue, 31 Mar 2020 16:25:15 +0800
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Subject: [PATCH] drm/i915/gvt: Allow Sos to access the plane owned by Guest
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before guest is booted
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Currently when one plane is assigned to UOS, it will block all the
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access to plane register in SOS. In such case it will cause that nothing
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is displayed on some display in course of sos booting. This is not
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expected. Before it is assigned to guest, it will still allow the SOS
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to access the plane register.
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Tracked-On:projectacrn/acrn-hypervisor#4572
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Reviewed-by: Liu Xinyun <xinyun.liu@intel.com>
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Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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---
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drivers/gpu/drm/i915/gvt/acrngt.c | 5 +++++
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drivers/gpu/drm/i915/gvt/gvt.h | 1 +
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drivers/gpu/drm/i915/intel_display.c | 16 +++++++++++-----
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drivers/gpu/drm/i915/intel_sprite.c | 20 ++++++++++++++++----
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4 files changed, 33 insertions(+), 9 deletions(-)
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diff --git a/drivers/gpu/drm/i915/gvt/acrngt.c b/drivers/gpu/drm/i915/gvt/acrngt.c
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index bdec6b7daa29..f2833ae17ef2 100644
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--- a/drivers/gpu/drm/i915/gvt/acrngt.c
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+++ b/drivers/gpu/drm/i915/gvt/acrngt.c
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@@ -81,6 +81,8 @@ void acrngt_instance_destroy(struct intel_vgpu *vgpu)
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struct intel_gvt *gvt = acrngt_priv.gvt;
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if (vgpu) {
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+ int domain_id = vgpu->id;
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+
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info = (struct acrngt_hvm_dev *)vgpu->handle;
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if (info && info->emulation_thread != NULL)
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@@ -97,6 +99,7 @@ void acrngt_instance_destroy(struct intel_vgpu *vgpu)
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intel_gvt_ops->vgpu_release(vgpu);
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intel_gvt_ops->vgpu_destroy(vgpu);
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+ gvt->domain_ready[domain_id] = false;
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}
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if (info) {
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@@ -304,6 +307,8 @@ struct intel_vgpu *acrngt_instance_create(domid_t vm_id,
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gvt_err("failed to create vgpu\n");
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return NULL;
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}
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+ /* after the VGPU is created, the domain owner is ready */
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+ acrngt_priv.gvt->domain_ready[vgpu->id] = true;
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info = kzalloc(sizeof(struct acrngt_hvm_dev), GFP_KERNEL);
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if (info == NULL) {
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diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
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index e881bbdd87f8..682711266672 100644
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--- a/drivers/gpu/drm/i915/gvt/gvt.h
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+++ b/drivers/gpu/drm/i915/gvt/gvt.h
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@@ -383,6 +383,7 @@ struct intel_gvt {
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void *intel_gvt_vreg_pool[GVT_MAX_VGPU];
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bool intel_gvt_vreg_allocated[GVT_MAX_VGPU];
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+ bool domain_ready[1 << 4];
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};
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static inline struct intel_gvt *to_gvt(struct drm_i915_private *i915)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index b62645c050f5..418222147600 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -3473,16 +3473,22 @@ static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id)
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{
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struct drm_device *dev = intel_crtc->base.dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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+ int pipe = intel_crtc->pipe;
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#if IS_ENABLED(CONFIG_DRM_I915_GVT)
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if (intel_gvt_active(dev_priv) &&
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- dev_priv->gvt->pipe_info[intel_crtc->pipe].scaler_owner[id] != 0)
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- return;
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+ dev_priv->gvt->pipe_info[pipe].scaler_owner[id] != 0) {
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+ int domain_id;
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+
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+ domain_id = dev_priv->gvt->pipe_info[pipe].scaler_owner[id];
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+ if (dev_priv->gvt->domain_ready[domain_id])
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+ return;
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+ }
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#endif
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- I915_WRITE(SKL_PS_CTRL(intel_crtc->pipe, id), 0);
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- I915_WRITE(SKL_PS_WIN_POS(intel_crtc->pipe, id), 0);
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- I915_WRITE(SKL_PS_WIN_SZ(intel_crtc->pipe, id), 0);
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+ I915_WRITE(SKL_PS_CTRL(pipe, id), 0);
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+ I915_WRITE(SKL_PS_WIN_POS(pipe, id), 0);
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+ I915_WRITE(SKL_PS_WIN_SZ(pipe, id), 0);
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}
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/*
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diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
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index b388a6b5b402..2d69914fdd55 100644
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--- a/drivers/gpu/drm/i915/intel_sprite.c
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+++ b/drivers/gpu/drm/i915/intel_sprite.c
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@@ -323,8 +323,14 @@ skl_update_plane(struct intel_plane *plane,
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#if IS_ENABLED(CONFIG_DRM_I915_GVT)
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if (dev_priv->gvt &&
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- dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id])
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- return;
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+ dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id]) {
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+ int domain_id;
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+
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+ domain_id =
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+ dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id];
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+ if (dev_priv->gvt->domain_ready[domain_id])
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+ return;
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+ }
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#endif
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/* Sizes are 0 based */
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src_w--;
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@@ -434,8 +440,14 @@ skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
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#if IS_ENABLED(CONFIG_DRM_I915_GVT)
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if (dev_priv->gvt &&
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- dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id])
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- return;
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+ dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id]) {
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+ int domain_id;
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+
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+ domain_id =
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+ dev_priv->gvt->pipe_info[pipe].plane_owner[plane_id];
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+ if (dev_priv->gvt->domain_ready[domain_id])
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+ return;
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+ }
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#endif
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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--
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https://clearlinux.org
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