clear-pkgs-linux-iot-lts2018/1233-Revert-drm-i915-gvt-In...

170 lines
4.8 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Liu Xinyun <xinyun.liu@intel.com>
Date: Wed, 18 Sep 2019 01:31:26 +0800
Subject: [PATCH] Revert "drm/i915/gvt: Introduce non-context MMIO check
routines"
The conformace check is some kind of debug feature and has limited
usage scenario. So drop this feature for WaaG
This reverts commit fa3213e395f5ffea849f3eb38217f2d9d42e5466.
Tracked-On: projectacrn/acrn-hypervisor#3830
Signed-off-by: Liu Xinyun <xinyun.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/gvt/gvt.h | 6 --
drivers/gpu/drm/i915/gvt/handlers.c | 9 ---
drivers/gpu/drm/i915/gvt/mmio_context.c | 80 -------------------------
3 files changed, 95 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index c7c7c1cd9bbd..c821c2861ec5 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -305,16 +305,10 @@ struct intel_gvt_mmio {
struct gvt_mmio_block *mmio_block;
unsigned int num_mmio_block;
- void *mmio_host_cache;
- bool host_cache_initialized;
DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
unsigned long num_tracked_mmio;
};
-/* Macro for easily access host engine mmio cached register */
-#define gvt_host_reg(gvt, reg) \
- (*(u32 *)(gvt->mmio.mmio_host_cache + reg)) \
-
struct intel_gvt_firmware {
void *cfg_space;
void *mmio;
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index b5eb2ed4eb43..9edf8c456dbb 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3530,9 +3530,6 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt)
vfree(gvt->mmio.mmio_attribute);
gvt->mmio.mmio_attribute = NULL;
-
- vfree(gvt->mmio.mmio_host_cache);
- gvt->mmio.mmio_host_cache = NULL;
}
/* Special MMIO blocks. */
@@ -3567,12 +3564,6 @@ int intel_gvt_setup_mmio_info(struct intel_gvt *gvt)
if (!gvt->mmio.mmio_attribute)
return -ENOMEM;
- gvt->mmio.mmio_host_cache = vzalloc(info->mmio_size);
- if (!gvt->mmio.mmio_host_cache) {
- vfree(gvt->mmio.mmio_attribute);
- return -ENOMEM;
- }
-
ret = init_generic_mmio_info(gvt);
if (ret)
goto err;
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 3cf86751cfa9..cdd366d44938 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -569,84 +569,6 @@ void intel_gvt_switch_mmio(struct intel_vgpu *pre,
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
}
-#define MMIO_COMPARE(vgpu, reg, mask) ({ \
- int ret; \
- u32 value = vgpu_vreg(vgpu, reg); \
- u32 host_value = gvt_host_reg(vgpu->gvt, reg); \
- \
- if (mask) { \
- value &= mask; \
- host_value &= mask; \
- } \
- if (host_value == value) { \
- ret = 0; \
- } else { \
- gvt_err("vgpu%d unconformance mmio 0x%x:0x%x,0x%x\n", \
- vgpu->id, reg, \
- vgpu_vreg(vgpu, reg), \
- gvt_host_reg(vgpu->gvt, reg)); \
- ret = -EINVAL; \
- } \
- ret; \
- })
-
-static int noncontext_mmio_compare(struct intel_vgpu *vgpu, int ring_id)
-{
- struct engine_mmio *mmio, *mmio_list;
-
- mmio_list = vgpu->gvt->engine_mmio_list.mmio;
-
- for (mmio = mmio_list; i915_mmio_reg_valid(mmio->reg); mmio++) {
- if (mmio->ring_id != ring_id || mmio->in_context)
- continue;
-
- if (MMIO_COMPARE(vgpu, mmio->reg.reg, mmio->mask))
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void get_host_mmio_snapshot(struct intel_gvt *gvt)
-{
- struct drm_i915_private *dev_priv = gvt->dev_priv;
- struct engine_mmio *mmio, *mmio_list;
-
- mmio_list = gvt->engine_mmio_list.mmio;
-
- if (!gvt->mmio.host_cache_initialized) {
- intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
- /* Snapshot all the non-context MMIOs */
- for (mmio = mmio_list; i915_mmio_reg_valid(mmio->reg); mmio++) {
- if (mmio->in_context)
- continue;
-
- gvt_host_reg(gvt, mmio->reg.reg) =
- I915_READ_FW(mmio->reg);
- if (mmio->mask)
- gvt_host_reg(gvt, mmio->reg.reg) &= mmio->mask;
- }
- gvt->mmio.host_cache_initialized = true;
- intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
- }
-}
-
-int intel_gvt_vgpu_conformance_check(struct intel_vgpu *vgpu, int ring_id)
-{
- int ret;
-
- get_host_mmio_snapshot(vgpu->gvt);
-
- ret = noncontext_mmio_compare(vgpu, ring_id);
- if (ret)
- goto err;
-
- return 0;
-err:
- return ret;
-}
-
-
/**
* intel_gvt_init_engine_mmio_context - Initiate the engine mmio list
* @gvt: GVT device
@@ -668,8 +590,6 @@ void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt)
if (mmio->in_context) {
gvt->engine_mmio_list.ctx_mmio_count[mmio->ring_id]++;
intel_gvt_mmio_set_in_ctx(gvt, mmio->reg.reg);
- } else {
- intel_gvt_mmio_set_non_context(gvt, mmio->reg.reg);
}
}
}
--
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