clear-pkgs-linux-iot-lts2018/1229-Revert-drm-i915-gvt-Si...

101 lines
3.1 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Liu Xinyun <xinyun.liu@intel.com>
Date: Wed, 18 Sep 2019 01:23:33 +0800
Subject: [PATCH] Revert "drm/i915/gvt: Simply the conformance check"
The conformace check is some kind of debug feature and has limited usage
scenario. So drop this feature for WaaG
This reverts commit a18fbaa702726dd8559bfe0ebabc096c0652364f.
Tracked-On: projectacrn/acrn-hypervisor#3830
Signed-off-by: Liu Xinyun <xinyun.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 26 --------------------------
drivers/gpu/drm/i915/gvt/gvt.h | 1 -
drivers/gpu/drm/i915/gvt/mmio.c | 10 ----------
3 files changed, 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 3db229220036..4d7c37de9052 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -966,32 +966,6 @@ static int cmd_handler_lri(struct parser_exec_state *s)
ret |= cmd_reg_handler(s, cmd_reg(s, i), i, "lri");
if (ret)
break;
-
- if (s->vgpu->entire_nonctxmmio_checked
- && intel_gvt_mmio_is_non_context(gvt,
- cmd_reg(s, i))) {
- int offset = cmd_reg(s, i);
- int value = cmd_val(s, i + 1);
-
- if (intel_gvt_mmio_has_mode_mask(gvt, offset)) {
- u32 mask = value >> 16;
-
- vgpu_vreg(s->vgpu, offset) =
- (vgpu_vreg(s->vgpu, offset) & ~mask)
- | (value & mask);
- } else {
- vgpu_vreg(s->vgpu, offset) = value;
- }
-
- if (gvt_host_reg(gvt, offset) !=
- vgpu_vreg(s->vgpu, offset)) {
-
- gvt_err("vgpu%d unexpected non-context MMIO "
- "access by cmd 0x%x:0x%x,0x%x\n",
- s->vgpu->id, offset, value,
- gvt_host_reg(gvt, offset));
- }
- }
}
return ret;
}
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index cd1f4076e4f1..f158ced1d80e 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -255,7 +255,6 @@ struct intel_vgpu {
unsigned long long *cached_guest_entry;
bool ge_cache_enable;
- bool entire_nonctxmmio_checked;
};
/* validating GM healthy status*/
diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index e6e38393595c..ef2dfc49e689 100644
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -213,14 +213,6 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa,
if (ret < 0)
goto err;
- if (vgpu->entire_nonctxmmio_checked
- && intel_gvt_mmio_is_non_context(vgpu->gvt, offset)
- && vgpu_vreg(vgpu, offset) != gvt_host_reg(gvt, offset)) {
- gvt_err("vgpu%d unexpected non-context MMIO change at 0x%x:0x%x,0x%x\n",
- vgpu->id, offset, vgpu_vreg(vgpu, offset),
- gvt_host_reg(gvt, offset));
- }
-
intel_gvt_mmio_set_accessed(gvt, offset);
ret = 0;
goto out;
@@ -306,8 +298,6 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
vgpu_vreg_t(vgpu, HUC_STATUS2) = I915_READ(HUC_STATUS2);
mmio_hw_access_post(dev_priv);
}
- /* Non-context MMIOs need entire check again if mmio/vgpu reset */
- vgpu->entire_nonctxmmio_checked = false;
}
/**
--
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