60 lines
2.1 KiB
Diff
60 lines
2.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Junming Liu <junming.liu@intel.com>
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Date: Fri, 30 Aug 2019 18:09:34 +0000
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Subject: [PATCH] drm/i915/gvt: Fix vGPU CSFE_CHICKEN1_REG mmio handler
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Enter failsafe if vgpu tries to change CSFE_CHICKEN1_REG setting
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which is controlled by host.
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Tracked-On: projectacrn/acrn-hypervisor#3630
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Signed-off-by: Junming Liu <junming.liu@intel.com>
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Signed-off-by: Colin Xu <colin.xu@intel.com>
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
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---
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drivers/gpu/drm/i915/gvt/handlers.c | 20 +++++++++++++++++++-
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1 file changed, 19 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
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index a5d7a4263017..b5eb2ed4eb43 100644
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--- a/drivers/gpu/drm/i915/gvt/handlers.c
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+++ b/drivers/gpu/drm/i915/gvt/handlers.c
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@@ -1900,6 +1900,21 @@ static int ring_reset_ctl_write(struct intel_vgpu *vgpu,
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return 0;
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}
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+static int csfe_chicken1_mmio_write(struct intel_vgpu *vgpu,
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+ unsigned int offset, void *p_data,
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+ unsigned int bytes)
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+{
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+ u32 data = *(u32 *)p_data;
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+
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+ (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(0x18);
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+ write_vreg(vgpu, offset, p_data, bytes);
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+
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+ if (data & _MASKED_BIT_ENABLE(0x10) || data & _MASKED_BIT_ENABLE(0x8))
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+ enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
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+
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+ return 0;
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+}
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+
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#define MMIO_F(reg, s, f, am, rm, d, r, w) do { \
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ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \
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f, s, am, rm, d, r, w); \
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@@ -3283,7 +3298,10 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
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MMIO_D(_MMIO(0x72034), D_SKL_PLUS);
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MMIO_D(_MMIO(0x44500), D_SKL_PLUS);
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- MMIO_DFH(GEN9_CSFE_CHICKEN1_RCS, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);
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+#define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4)
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+ MMIO_RING_DFH(CSFE_CHICKEN1_REG, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
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+ NULL, csfe_chicken1_mmio_write);
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+#undef CSFE_CHICKEN1_REG
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MMIO_DFH(GEN8_HDC_CHICKEN1, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
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NULL, NULL);
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MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
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--
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https://clearlinux.org
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