50 lines
2.7 KiB
Diff
50 lines
2.7 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: yangz1x <zhonghuax.yang@intel.com>
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Date: Wed, 31 Jul 2019 11:47:59 +0800
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Subject: [PATCH] media: i2c: fix hdmi YVYV to UYVY color incorrect issue
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Fix i2c config for ADV7471 HDMI input
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Change-Id: Ib58f2605aa9afea70f41aa40e42c5726eb625a3b
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Tracked-On: HSD-1507044829
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Tracked-On: PKT-2253
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Signed-off-by: Yang, Zhonghua <zhonghuax.yang@intel.com>
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---
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.../i2c/crlmodule-lite/crl_adv7481_hdmi_configuration.h | 5 +++--
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drivers/media/i2c/crlmodule/crl_adv7481_hdmi_configuration.h | 1 +
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2 files changed, 4 insertions(+), 2 deletions(-)
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diff --git a/drivers/media/i2c/crlmodule-lite/crl_adv7481_hdmi_configuration.h b/drivers/media/i2c/crlmodule-lite/crl_adv7481_hdmi_configuration.h
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index 8c2c3d494ba0..ba65aaf96299 100644
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--- a/drivers/media/i2c/crlmodule-lite/crl_adv7481_hdmi_configuration.h
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+++ b/drivers/media/i2c/crlmodule-lite/crl_adv7481_hdmi_configuration.h
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@@ -180,10 +180,11 @@ static struct crl_register_write_rep adv7481_hdmi_mode_rgb888[] = {
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};
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static struct crl_register_write_rep adv7481_hdmi_mode_uyvy[] = {
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- {0x04, CRL_REG_LEN_08BIT, 0x00, 0xE0}, //YCrCb output
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+ {0x1C, CRL_REG_LEN_08BIT, 0x00, 0xE0}, /* ADI Require Write*/
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+ {0x04, CRL_REG_LEN_08BIT, 0x00, 0xE0}, /* YCrCb output */
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{0x12, CRL_REG_LEN_08BIT, 0xF2, 0xE0}, //CSC Depends on ip Packets - SDR422 set
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{0x17, CRL_REG_LEN_08BIT, 0x80, 0xE0}, //Luma & Chroma Values Can Reach 254d
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- {0x03, CRL_REG_LEN_08BIT, 0x86, 0xE0}, //CP-Insert_AV_Code
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+ {0x3E, CRL_REG_LEN_08BIT, 0x00, 0x44}, /* Invert order of Cb and Cr*/
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{0x7C, CRL_REG_LEN_08BIT, 0x00, 0x44}, //ADI Required Write
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{0x0C, CRL_REG_LEN_08BIT, 0xE0, 0xE0}, //Enable LLC_DLL & Double LLC Timing
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{0x0E, CRL_REG_LEN_08BIT, 0xDD, 0xE0}, //LLC/PIX/SPI PINS TRISTATED AUD Outputs Enabled
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diff --git a/drivers/media/i2c/crlmodule/crl_adv7481_hdmi_configuration.h b/drivers/media/i2c/crlmodule/crl_adv7481_hdmi_configuration.h
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index 0a3394569509..b4089752c179 100644
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--- a/drivers/media/i2c/crlmodule/crl_adv7481_hdmi_configuration.h
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+++ b/drivers/media/i2c/crlmodule/crl_adv7481_hdmi_configuration.h
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@@ -197,6 +197,7 @@ static struct crl_register_write_rep adv7481_hdmi_mode_uyvy[] = {
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{0x04, CRL_REG_LEN_08BIT, 0x00, 0xE0}, /* YCrCb output */
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{0x12, CRL_REG_LEN_08BIT, 0xF2, 0xE0}, /* CSC Depends on ip Packets - SDR422 set */
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{0x17, CRL_REG_LEN_08BIT, 0x80, 0xE0}, /* Luma & Chroma Values Can Reach 254d */
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+ {0x3E, CRL_REG_LEN_08BIT, 0x00, 0x44}, /* Invert order of Cb and Cr*/
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{0x7C, CRL_REG_LEN_08BIT, 0x00, 0x44}, /* ADI Required Write */
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{0x0C, CRL_REG_LEN_08BIT, 0xE0, 0xE0}, /* Enable LLC_DLL & Double LLC Timing */
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{0x0E, CRL_REG_LEN_08BIT, 0xDD, 0xE0}, /* LLC/PIX/SPI PINS TRISTATED AUD Outputs Enabled */
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--
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https://clearlinux.org
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