84 lines
2.9 KiB
Diff
84 lines
2.9 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Weinan Li <weinan.z.li@intel.com>
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Date: Tue, 17 Apr 2018 14:37:26 +0800
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Subject: [PATCH] drm/i915/gvt: force to active the high-performance mode
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during vGPU busy
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With the RPS interrupt, KMD can adjust the GPU frequency dynamically for
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power saving. It works well in the non-virtualized environment, but there
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is more latency imported by VMM and virtual interrupt handler which may
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break the RPS policy work model, and GPU works in inefficient mode. Here
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we force to active the high-performance mode when detect vgpu is busy until
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the GPU runs into idle.
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Change-Id: I7bc506b811a94314f068a7891b5e250a6f3f7162
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Tracked-On: projectacrn/acrn-hypervisor/issues/2227
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Signed-off-by: Weinan Li <weinan.z.li@intel.com>
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Signed-off-by: Min He <min.he@intel.com>
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Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
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Tracked-On: PKT-1642
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---
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drivers/gpu/drm/i915/gvt/gvt.h | 1 +
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drivers/gpu/drm/i915/gvt/scheduler.c | 19 +++++++++++++++++++
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2 files changed, 20 insertions(+)
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diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
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index 7da1e9bad5cc..9f3fed27445f 100644
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--- a/drivers/gpu/drm/i915/gvt/gvt.h
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+++ b/drivers/gpu/drm/i915/gvt/gvt.h
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@@ -370,6 +370,7 @@ struct intel_gvt {
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} engine_mmio_list;
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struct dentry *debugfs_root;
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+ struct work_struct active_hp_work;
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};
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static inline struct intel_gvt *to_gvt(struct drm_i915_private *i915)
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diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
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index af508d5860ea..b025875eee93 100644
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--- a/drivers/gpu/drm/i915/gvt/scheduler.c
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+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
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@@ -265,6 +265,22 @@ static void save_ring_hw_state(struct intel_vgpu *vgpu, int ring_id)
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}
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*/
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+static void active_hp_work(struct work_struct *work)
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+{
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+ struct intel_gvt *gvt =
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+ container_of(work, struct intel_gvt, active_hp_work);
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+ struct drm_i915_private *dev_priv = gvt->dev_priv;
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+
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+ gen6_disable_rps_interrupts(dev_priv);
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+
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+ if (READ_ONCE(dev_priv->gt_pm.rps.cur_freq) <
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+ READ_ONCE(dev_priv->gt_pm.rps.rp0_freq)) {
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+ mutex_lock(&dev_priv->pcu_lock);
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+ intel_set_rps(dev_priv, dev_priv->gt_pm.rps.rp0_freq);
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+ mutex_unlock(&dev_priv->pcu_lock);
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+ }
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+}
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+
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static int shadow_context_status_change(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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@@ -284,6 +300,7 @@ static int shadow_context_status_change(struct notifier_block *nb,
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switch (action) {
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case INTEL_CONTEXT_SCHEDULE_IN:
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+ schedule_work(&gvt->active_hp_work);
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atomic_set(&workload->shadow_ctx_active, 1);
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break;
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case INTEL_CONTEXT_SCHEDULE_OUT:
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@@ -1170,6 +1187,8 @@ int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt)
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atomic_notifier_chain_register(&engine->context_status_notifier,
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&gvt->shadow_ctx_notifier_block[i]);
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}
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+ INIT_WORK(&gvt->active_hp_work, active_hp_work);
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+
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return 0;
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err:
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intel_gvt_clean_workload_scheduler(gvt);
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--
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https://clearlinux.org
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