clear-pkgs-linux-iot-lts2018/0667-drm-i915-gvt-fix-missing-kernel-doc-for-cfg-mmio-vgp.patch

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Xinyun Liu <xinyun.liu@intel.com>
Date: Mon, 22 Oct 2018 10:40:18 +0800
Subject: [PATCH] drm/i915/gvt: fix missing kernel doc for cfg/mmio/vgpu/mpt

The doc needs to be updated after rebase to v4.19

Tracked-On: projectacrn/acrn-hypervisor#1511

Signed-off-by: Xinyun Liu <xinyun.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
 drivers/gpu/drm/i915/gvt/cfg_space.c | 13 +++++++++++++
 drivers/gpu/drm/i915/gvt/mmio.c      |  4 ++--
 drivers/gpu/drm/i915/gvt/mpt.h       | 21 +++++++++++++++++++--
 drivers/gpu/drm/i915/gvt/vgpu.c      |  2 ++
 4 files changed, 36 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c b/drivers/gpu/drm/i915/gvt/cfg_space.c
index 8606925d339d..4cf3f1c00cd2 100644
--- a/drivers/gpu/drm/i915/gvt/cfg_space.c
+++ b/drivers/gpu/drm/i915/gvt/cfg_space.c
@@ -56,6 +56,10 @@ static const u8 pci_cfg_space_rw_bmp[PCI_INTERRUPT_LINE + 4] = {
 
 /**
  * vgpu_pci_cfg_mem_write - write virtual cfg space memory
+ * @vgpu: a vGPU
+ * @off: offset into the PCI configuration space
+ * @src: data buffer write to vGPU's emulated configure space
+ * @bytes: size of data to write in bytes
  *
  * Use this function to write virtual cfg space memory.
  * For standard cfg space, only RW bits can be changed,
@@ -92,6 +96,11 @@ static void vgpu_pci_cfg_mem_write(struct intel_vgpu *vgpu, unsigned int off,
 /**
  * intel_vgpu_emulate_cfg_read - emulate vGPU configuration space read
  *
+ * @vgpu: a vGPU
+ * @offset: offset into the PCI configuration space
+ * @p_data: data buffer read from vGPU's emulated configure space
+ * @bytes: size of data to read in bytes
+ *
  * Returns:
  * Zero on success, negative error code if failed.
  */
@@ -326,6 +335,10 @@ static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset,
 
 /**
  * intel_vgpu_emulate_cfg_read - emulate vGPU configuration space write
+ * @vgpu: a vGPU
+ * @offset: offset into the PCI configuration space
+ * @p_data: data buffer write to vGPU's emulated configure space
+ * @bytes: size of data to write in bytes
  *
  * Returns:
  * Zero on success, negative error code if failed.
diff --git a/drivers/gpu/drm/i915/gvt/mmio.c b/drivers/gpu/drm/i915/gvt/mmio.c
index b6a974f55805..8a28db93bb1e 100644
--- a/drivers/gpu/drm/i915/gvt/mmio.c
+++ b/drivers/gpu/drm/i915/gvt/mmio.c
@@ -39,7 +39,7 @@
 /**
  * intel_vgpu_gpa_to_mmio_offset - translate a GPA to MMIO offset
  * @vgpu: a vGPU
- *
+ * @gpa: guest physical address
  * Returns:
  * Zero on success, negative error code if failed
  */
@@ -236,7 +236,7 @@ int intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, uint64_t pa,
 /**
  * intel_vgpu_reset_mmio - reset virtual MMIO space
  * @vgpu: a vGPU
- *
+ * @dmlr: vGPU Device Model Level Reset or GT Reset
  */
 void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr)
 {
diff --git a/drivers/gpu/drm/i915/gvt/mpt.h b/drivers/gpu/drm/i915/gvt/mpt.h
index 6eef2e01e46a..14fa2ea047fa 100644
--- a/drivers/gpu/drm/i915/gvt/mpt.h
+++ b/drivers/gpu/drm/i915/gvt/mpt.h
@@ -45,6 +45,9 @@
 
 /**
  * intel_gvt_hypervisor_host_init - init GVT-g host side
+ * @dev: i915 device
+ * @gvt: GVT device
+ * @ops: intel_gvt_ops interface
  *
  * Returns:
  * Zero on success, negative error code if failed
@@ -61,6 +64,8 @@ static inline int intel_gvt_hypervisor_host_init(struct device *dev,
 
 /**
  * intel_gvt_hypervisor_host_exit - exit GVT-g host side
+ * @dev: i915 device
+ * @gvt: GVT device
  */
 static inline void intel_gvt_hypervisor_host_exit(struct device *dev,
 			void *gvt)
@@ -75,6 +80,7 @@ static inline void intel_gvt_hypervisor_host_exit(struct device *dev,
 /**
  * intel_gvt_hypervisor_attach_vgpu - call hypervisor to initialize vGPU
  * related stuffs inside hypervisor.
+ * @vgpu: a vGPU
  *
  * Returns:
  * Zero on success, negative error code if failed.
@@ -91,6 +97,7 @@ static inline int intel_gvt_hypervisor_attach_vgpu(struct intel_vgpu *vgpu)
 /**
  * intel_gvt_hypervisor_detach_vgpu - call hypervisor to release vGPU
  * related stuffs inside hypervisor.
+ * @vgpu: a vGPU
  *
  * Returns:
  * Zero on success, negative error code if failed.
@@ -111,6 +118,7 @@ static inline void intel_gvt_hypervisor_detach_vgpu(struct intel_vgpu *vgpu)
 
 /**
  * intel_gvt_hypervisor_inject_msi - inject a MSI interrupt into vGPU
+ * @vgpu: a vGPU
  *
  * Returns:
  * Zero on success, negative error code if failed.
@@ -142,7 +150,7 @@ static inline int intel_gvt_hypervisor_inject_msi(struct intel_vgpu *vgpu)
 }
 
 /**
- * intel_gvt_hypervisor_set_wp_page - translate a host VA into MFN
+ * intel_gvt_hypervisor_virt_to_mfn - translate a host VA into MFN
  * @p: host kernel virtual address
  *
  * Returns:
@@ -216,7 +224,7 @@ static inline int intel_gvt_hypervisor_write_gpa(struct intel_vgpu *vgpu,
 /**
  * intel_gvt_hypervisor_gfn_to_mfn - translate a GFN to MFN
  * @vgpu: a vGPU
- * @gpfn: guest pfn
+ * @gfn: guest pfn
  *
  * Returns:
  * MFN on success, INTEL_GVT_INVALID_ADDR if failed.
@@ -383,6 +391,15 @@ static inline bool intel_gvt_hypervisor_is_valid_gfn(
 	return intel_gvt_host.mpt->is_valid_gfn(vgpu->handle, gfn);
 }
 
+/**
+ * intel_gvt_hypervisor_dom0_ready - Signal Dom 0 is ready for Dom U
+ *
+ * It's to raise a uevent to notify Dom 0 is ready to start a Dom U, so that
+ * Dom U can be started as early as possible
+ *
+ * Returns:
+ * Zero on success, negative error code if failed
+ */
 static inline int intel_gvt_hypervisor_dom0_ready(void)
 {
 	if (!intel_gvt_host.mpt->dom0_ready)
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index f95c646afa7d..08e99dd14344 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -117,6 +117,8 @@ static struct {
  *
  * Initialize vGPU type list based on available resource.
  *
+ * Returns:
+ * Zero on success, negative error code if failed.
  */
 int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
 {
-- 
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