108 lines
4.1 KiB
Diff
108 lines
4.1 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Min He <min.he@intel.com>
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Date: Thu, 28 Dec 2017 12:21:16 +0800
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Subject: [PATCH] drm/i915/gvt: local display support in GVT-g guest
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This patch includes below features in GVT-g guest
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1. DP on port A will be treated as external DP
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2. Avoid some unnecessary checks in GVT-g guest
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3. initial default vbt values by using PCH_NONE
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Change-Id: I6f6dfa4e5c801e7a63105310d5991adb0a0acad1
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Signed-off-by: Min He <min.he@intel.com>
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Reviewed-on:
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Reviewed-by: Jiang, Fei <fei.jiang@intel.com>
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Reviewed-by: Dong, Eddie <eddie.dong@intel.com>
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Tested-by: Dong, Eddie <eddie.dong@intel.com>
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---
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drivers/gpu/drm/i915/intel_bios.c | 8 ++++++++
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drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
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drivers/gpu/drm/i915/intel_display.c | 11 ++++++++++-
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drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
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4 files changed, 26 insertions(+), 4 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
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index 1faa494e2bc9..1f99373dcd77 100644
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--- a/drivers/gpu/drm/i915/intel_bios.c
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+++ b/drivers/gpu/drm/i915/intel_bios.c
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@@ -1726,6 +1726,14 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
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return;
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}
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+ if (HAS_PCH_NOP(dev_priv) && !intel_vgpu_active(dev_priv)) {
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+ DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
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+ return;
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+ }
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+ else if (HAS_PCH_NOP(dev_priv)) {
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+ dev_priv->pch_type = PCH_NONE;
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+ }
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+
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init_vbt_defaults(dev_priv);
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/* If the OpRegion does not have VBT, look in PCI ROM. */
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diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
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index b4b1f9ca05b6..0304a18690ea 100644
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--- a/drivers/gpu/drm/i915/intel_ddi.c
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+++ b/drivers/gpu/drm/i915/intel_ddi.c
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@@ -1882,7 +1882,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
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goto out;
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}
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- if (port == PORT_A)
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+ if (port == PORT_A && !intel_vgpu_active(dev_priv))
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cpu_transcoder = TRANSCODER_EDP;
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else
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cpu_transcoder = (enum transcoder) pipe;
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@@ -3278,7 +3278,7 @@ static bool intel_ddi_compute_config(struct intel_encoder *encoder,
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enum port port = encoder->port;
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int ret;
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- if (port == PORT_A)
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+ if (port == PORT_A && !intel_vgpu_active(dev_priv))
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pipe_config->cpu_transcoder = TRANSCODER_EDP;
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if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 6902fd2da19c..5c71bf36472b 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -11904,7 +11904,16 @@ verify_crtc_state(struct drm_crtc *crtc,
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intel_pipe_config_sanity_check(dev_priv, pipe_config);
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sw_config = to_intel_crtc_state(new_crtc_state);
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- if (!intel_pipe_config_compare(dev_priv, sw_config,
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+
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+ /*
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+ * Only check for pipe config if we are not in a GVT guest environment,
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+ * because such a check in a GVT guest environment doesn't make any sense
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+ * as we don't allow the guest to do a mode set, so there can very well
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+ * be a difference between what it has programmed vs. what the host
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+ * truly configured the HW pipe to be in.
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+ */
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+ if (!intel_vgpu_active(dev_priv) &&
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+ !intel_pipe_config_compare(dev_priv, sw_config,
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pipe_config, false)) {
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I915_STATE_WARN(1, "pipe state doesn't match!\n");
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intel_dump_pipe_config(intel_crtc, pipe_config,
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diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
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index da00b594d408..9474585fc83e 100644
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--- a/drivers/gpu/drm/i915/intel_dp.c
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+++ b/drivers/gpu/drm/i915/intel_dp.c
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@@ -2075,7 +2075,12 @@ static void wait_panel_status(struct intel_dp *intel_dp,
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I915_READ(pp_stat_reg),
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I915_READ(pp_ctrl_reg));
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- if (intel_wait_for_register(dev_priv,
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+ /*
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+ * Only wait for panel status if we are not in a GVT guest environment,
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+ * because such a wait in a GVT guest environment doesn't make any sense
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+ * as we are exposing virtual DP monitors to the guest.
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+ */
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+ if (!intel_vgpu_active(dev_priv) && intel_wait_for_register(dev_priv,
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pp_stat_reg, mask, value,
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5000))
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DRM_ERROR("Panel status timeout: status %08x control %08x\n",
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--
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https://clearlinux.org
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