From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Liu Xinyun Date: Thu, 31 Oct 2019 19:44:40 +0800 Subject: [PATCH] drm/i915/gvt: don't update invalid surface address Normally 0 belongs to SOS, if plane/pipe is not disabled, SOS screen content will be shown on the display screen which is assigned to UOS Tracked-On: projectacrn/acrn-hypervisor#3979 Signed-off-by: Liu Xinyun Reviewed-by: Zhao Yakui --- drivers/gpu/drm/i915/gvt/handlers.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 9edf8c456dbb..b1cf1ef40ce5 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -2975,7 +2975,8 @@ static int skl_plane_surf_write(struct intel_vgpu *vgpu, unsigned int offset, vgpu_vreg_t(vgpu, reg_1ac) = vgpu_vreg(vgpu, offset); if ((vgpu_vreg_t(vgpu, PIPECONF(pipe)) & I965_PIPECONF_ACTIVE) && - (vgpu->gvt->pipe_info[pipe].plane_owner[plane] == vgpu->id)) { + (vgpu->gvt->pipe_info[pipe].plane_owner[plane] == vgpu->id) && + (*(u32 *)p_data != 0)) { I915_WRITE(_MMIO(offset), vgpu_vreg(vgpu, offset)); } -- https://clearlinux.org