From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Zhipeng Gong Date: Tue, 23 Oct 2018 11:02:11 +0800 Subject: [PATCH] drm/i915/gvt: rebase gvtbuffer to use upstream functions. Upstream code ignores pipe id passed from user space and detect active pipe automatically in intel_vgpu_decode_primary_plane. This patch rebases gvtbuffer ioctl to use the upstream functions and ignore pipe id. v2: split the patch v3: add CONFIG_DRM_I915_GVT enable check and gvt null check v4: only build i915_gem_gvtbuffer.c when CONFIG_DRM_I915_GVT enabled Tracked-On: projectacrn/acrn-hypervisor#1576 Signed-off-by: Zhipeng Gong Reviewed-by: Zhao Yakui --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/gvt/fb_decoder.c | 67 ------------------ drivers/gpu/drm/i915/gvt/fb_decoder.h | 5 -- drivers/gpu/drm/i915/i915_drv.h | 8 +++ drivers/gpu/drm/i915/i915_gem_gvtbuffer.c | 86 ++++++++++++----------- 5 files changed, 55 insertions(+), 114 deletions(-) diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index a5198df1b1ca..517620bcbadd 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -79,7 +79,6 @@ i915-y += i915_cmd_parser.o \ i915_trace_points.o \ i915_vma.o \ intel_breadcrumbs.o \ - i915_gem_gvtbuffer.o \ intel_engine_cs.o \ intel_hangcheck.o \ intel_lrc.o \ @@ -184,7 +183,7 @@ i915-y += i915_perf.o \ i915_oa_icl.o ifeq ($(CONFIG_DRM_I915_GVT),y) -i915-y += intel_gvt.o +i915-y += intel_gvt.o i915_gem_gvtbuffer.o include $(src)/gvt/Makefile endif diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c index f8ce268286bb..0d616c500db4 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c @@ -513,70 +513,3 @@ int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, return 0; } - -/** - * intel_vgpu_decode_fb_format - Decode framebuffer information from raw vMMIO - * @gvt: GVT device - * @vmid: guest domain ID - * @fb: frame buffer infomation of guest. - * This function is called for query frame buffer format, so that gl can - * display guest fb in Dom0 - * - * Returns: - * Zero on success, negative error code if failed. - */ -int intel_vgpu_decode_fb_format(struct intel_gvt *gvt, int id, - struct intel_vgpu_fb_format *fb) - -{ - int i; - struct intel_vgpu *vgpu = NULL; - int ret = 0; - struct drm_i915_private *dev_priv = gvt->dev_priv; - - if (!fb) - return -EINVAL; - - /* TODO: use fine-grained refcnt later */ - mutex_lock(&gvt->lock); - - for_each_active_vgpu(gvt, vgpu, i) - if (vgpu->id == id) - break; - - if (!vgpu) { - gvt_err("Invalid vgpu ID (%d)\n", id); - mutex_unlock(&gvt->lock); - return -ENODEV; - } - - for (i = 0; i < I915_MAX_PIPES; i++) { - struct intel_vgpu_pipe_format *pipe = &fb->pipes[i]; - u32 ddi_func_ctl = vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(i)); - - if (!(ddi_func_ctl & TRANS_DDI_FUNC_ENABLE)) { - pipe->ddi_port = DDI_PORT_NONE; - } else { - u32 port = (ddi_func_ctl & TRANS_DDI_PORT_MASK) >> - TRANS_DDI_PORT_SHIFT; - if (port <= DDI_PORT_E) - pipe->ddi_port = port; - else - pipe->ddi_port = DDI_PORT_NONE; - } - - ret |= intel_vgpu_decode_primary_plane(vgpu, &pipe->primary); - ret |= intel_vgpu_decode_sprite_plane(vgpu, &pipe->sprite); - ret |= intel_vgpu_decode_cursor_plane(vgpu, &pipe->cursor); - - if (ret) { - gvt_err("Decode format error for pipe(%d)\n", i); - ret = -EINVAL; - break; - } - } - - mutex_unlock(&gvt->lock); - - return ret; -} diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h index 51626759534b..6c51fe00d421 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.h +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h @@ -169,9 +169,4 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, struct intel_vgpu_cursor_plane_format *plane); int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, struct intel_vgpu_sprite_plane_format *plane); - -extern -int intel_vgpu_decode_fb_format(struct intel_gvt *pdev, int vmid, - struct intel_vgpu_fb_format *fb); - #endif diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index bed0e3ca4399..1b61ed91687f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3278,8 +3278,16 @@ int i915_perf_remove_config_ioctl(struct drm_device *dev, void *data, void i915_oa_init_reg_state(struct intel_engine_cs *engine, struct i915_gem_context *ctx, uint32_t *reg_state); +#ifdef CONFIG_DRM_I915_GVT int i915_gem_gvtbuffer_ioctl(struct drm_device *dev, void *data, struct drm_file *file); +#else +static inline int i915_gem_gvtbuffer_ioctl(struct drm_device *dev, void *data, + struct drm_file *file) +{ + return -EINVAL; +} +#endif /* i915_gem_evict.c */ int __must_check i915_gem_evict_something(struct i915_address_space *vm, diff --git a/drivers/gpu/drm/i915/i915_gem_gvtbuffer.c b/drivers/gpu/drm/i915/i915_gem_gvtbuffer.c index 6e58fa1fb1d2..fb1ced042a4e 100644 --- a/drivers/gpu/drm/i915/i915_gem_gvtbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_gvtbuffer.c @@ -148,53 +148,59 @@ static int gvt_decode_information(struct drm_device *dev, struct drm_i915_gem_gvtbuffer *args) { struct drm_i915_private *dev_priv = dev->dev_private; - struct intel_vgpu_fb_format fb; - struct intel_vgpu_primary_plane_format *p; - struct intel_vgpu_cursor_plane_format *c; - struct intel_vgpu_pipe_format *pipe; -#if IS_ENABLED(CONFIG_DRM_I915_GVT) - u32 id = args->id; - - if (intel_vgpu_decode_fb_format(dev_priv->gvt, id, &fb)) + struct intel_gvt *gvt = dev_priv->gvt; + struct intel_vgpu_primary_plane_format p; + struct intel_vgpu_cursor_plane_format c; + struct intel_vgpu *vgpu = NULL; + int ret; + int i; + + if (!intel_gvt_active(dev_priv)) return -EINVAL; -#else - return -EINVAL; -#endif - pipe = ((args->pipe_id >= I915_MAX_PIPES) ? - NULL : &fb.pipes[args->pipe_id]); + mutex_lock(&gvt->lock); + for_each_active_vgpu(gvt, vgpu, i) + if (vgpu->id == args->id) + break; - if (!pipe || !pipe->primary.enabled) { - DRM_DEBUG_DRIVER("GVT_GEM: Invalid pipe_id: %d\n", - args->pipe_id); - return -EINVAL; + if (!vgpu) { + gvt_err("Invalid vgpu ID (%d)\n", args->id); + mutex_unlock(&gvt->lock); + return -ENODEV; } + mutex_unlock(&gvt->lock); if ((args->plane_id) == I915_GVT_PLANE_PRIMARY) { - p = &pipe->primary; - args->enabled = p->enabled; - args->x_offset = p->x_offset; - args->y_offset = p->y_offset; - args->start = p->base; - args->width = p->width; - args->height = p->height; - args->stride = p->stride; - args->bpp = p->bpp; - args->hw_format = p->hw_format; - args->drm_format = p->drm_format; - args->tiled = p->tiled; + ret = intel_vgpu_decode_primary_plane(vgpu, &p); + if (ret) + return ret; + + args->enabled = p.enabled; + args->x_offset = p.x_offset; + args->y_offset = p.y_offset; + args->start = p.base; + args->width = p.width; + args->height = p.height; + args->stride = p.stride; + args->bpp = p.bpp; + args->hw_format = p.hw_format; + args->drm_format = p.drm_format; + args->tiled = p.tiled; } else if ((args->plane_id) == I915_GVT_PLANE_CURSOR) { - c = &pipe->cursor; - args->enabled = c->enabled; - args->x_offset = c->x_hot; - args->y_offset = c->y_hot; - args->x_pos = c->x_pos; - args->y_pos = c->y_pos; - args->start = c->base; - args->width = c->width; - args->height = c->height; - args->stride = c->width * (c->bpp / 8); - args->bpp = c->bpp; + ret = intel_vgpu_decode_cursor_plane(vgpu, &c); + if (ret) + return ret; + + args->enabled = c.enabled; + args->x_offset = c.x_hot; + args->y_offset = c.y_hot; + args->x_pos = c.x_pos; + args->y_pos = c.y_pos; + args->start = c.base; + args->width = c.width; + args->height = c.height; + args->stride = c.width * (c.bpp / 8); + args->bpp = c.bpp; args->tiled = 0; } else { DRM_DEBUG_DRIVER("GVT_GEM: Invalid plaine_id: %d\n", -- https://clearlinux.org