update to PKT lts-v4.19.20-base-190216T234416Z

Signed-off-by: Alek Du <alek.du@intel.com>
This commit is contained in:
Alek Du 2019-02-18 08:28:48 +00:00
parent f868e6b881
commit d21745fdd5
7 changed files with 277 additions and 5 deletions

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@ -0,0 +1,47 @@
From ce0eae4bad4fc6b4e4e350768701bac1ca4c6ee8 Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Wed, 30 Jan 2019 09:20:16 +0800
Subject: [PATCH 1/5] drm/i915/gvt: Refine the snapshort range of I915 MCHBAR
to optimize gvt-g boot time
Currently it will take the snapshot of the MCHBAR registers for gvt-g
initialization so that it can be used for guest vgpu. And it will cover
from 0x140000 to 0x17ffff. In fact based on the HW spec most of them are
meanlingless and some time is wasted to read these register.
Only the range of 0x144000 to 0x147fff contains the valid definition.
So the range of capturing I915 MCHBAR register is refined, which helps
to optimize the gvt-g boot time.
Tracked-On: projectacrn/acrn-hypervisor#2451
Tracked-On: PKT-1737
Acked-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/gvt/handlers.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index f923ca71ab8e..02c12fbeafd3 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -47,6 +47,8 @@
#define PCH_PP_OFF_DELAYS _MMIO(0xc720c)
#define PCH_PP_DIVISOR _MMIO(0xc7210)
+#define MCHBAR_MEM_BASE _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x4000)
+
unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt)
{
if (IS_BROADWELL(gvt->dev_priv))
@@ -3443,7 +3445,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt)
/* Special MMIO blocks. */
static struct gvt_mmio_block mmio_blocks[] = {
{D_SKL_PLUS, _MMIO(CSR_MMIO_START_RANGE), 0x3000, NULL, NULL},
- {D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x40000, NULL, NULL},
+ {D_ALL, MCHBAR_MEM_BASE, 0x4000, NULL, NULL},
{D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE,
pvinfo_mmio_read, pvinfo_mmio_write},
{D_ALL, LGC_PALETTE(PIPE_A, 0), 1024, NULL, NULL},
--
2.17.1

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@ -0,0 +1,44 @@
From a7269ab0d00eb062b2f635077664f7efa0ff8ba0 Mon Sep 17 00:00:00 2001
From: Feng Tang <feng.tang@intel.com>
Date: Wed, 30 Jan 2019 13:39:58 +0800
Subject: [PATCH 2/5] drm/i915/gvt: optimize the oos memory setup
current oos memory occupy 33M memory, and its initialization
takes about 30ms for APL. Since now PVMMIO is used instead of
oos, reduce its memory size. Also change the kzalloc to kmalloc
as the oos page will be read first anyway. With this, the setup
time could be reduced to 3ms.
Tracked-On: projectacrn/acrn-hypervisor#2451
Tracked-On: PKT-1737
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
---
drivers/gpu/drm/i915/gvt/gtt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index 0119a4772783..97e762fb27ea 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -45,7 +45,7 @@
#endif
static bool enable_out_of_sync = true;
-static int preallocated_oos_pages = 8192;
+static int preallocated_oos_pages = 2048;
/*
* validate a gm address and related range size,
@@ -2703,7 +2703,7 @@ static int setup_spt_oos(struct intel_gvt *gvt)
INIT_LIST_HEAD(&gtt->oos_page_use_list_head);
for (i = 0; i < preallocated_oos_pages; i++) {
- oos_page = kzalloc(sizeof(*oos_page), GFP_KERNEL);
+ oos_page = kmalloc(sizeof(*oos_page), GFP_KERNEL);
if (!oos_page) {
ret = -ENOMEM;
goto fail;
--
2.17.1

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@ -0,0 +1,47 @@
From f2b09d0e5c7bce9caddb46718724b95a24424546 Mon Sep 17 00:00:00 2001
From: Min He <min.he@intel.com>
Date: Fri, 15 Feb 2019 03:52:45 +0000
Subject: [PATCH 3/5] drm/i915/gvt: limit the active perf on BXT platform
In commit "drm/i915/gvt: force to active the high-performance mode
during vGPU busy", it set the max GPU freq when there's GVT workload,
but on BXT platform, the max GPU freq will impact the CPU performance,
To make a balance between GPU and CPU, we hardcode it to 600Mhz on BXT
platform.
Also, this patch will not disable rps interrupt anymore, so that if
workload is heavier, GPU freq can be adjusted to higher.
Tracked-On: projectacrn/acrn-hypervisor#2537
Tracked-On: PKT-1737
Signed-off-by: Min He <min.he@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/gvt/scheduler.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
index 51060ff067e8..87944a44cb51 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -270,13 +270,14 @@ static void active_hp_work(struct work_struct *work)
struct intel_gvt *gvt =
container_of(work, struct intel_gvt, active_hp_work);
struct drm_i915_private *dev_priv = gvt->dev_priv;
+ u8 freq = dev_priv->gt_pm.rps.rp0_freq;
- gen6_disable_rps_interrupts(dev_priv);
+ if (IS_BROXTON(dev_priv))
+ freq = intel_freq_opcode(dev_priv, 600);
- if (READ_ONCE(dev_priv->gt_pm.rps.cur_freq) <
- READ_ONCE(dev_priv->gt_pm.rps.rp0_freq)) {
+ if (READ_ONCE(dev_priv->gt_pm.rps.cur_freq) < freq) {
mutex_lock(&dev_priv->pcu_lock);
- intel_set_rps(dev_priv, dev_priv->gt_pm.rps.rp0_freq);
+ intel_set_rps(dev_priv, freq);
mutex_unlock(&dev_priv->pcu_lock);
}
}
--
2.17.1

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@ -0,0 +1,38 @@
From 65d743d543908e2b0b6f0227fa6a5aaf279d9177 Mon Sep 17 00:00:00 2001
From: "Gopal, Puunithaaraj" <puunithaaraj.gopal@intel.com>
Date: Wed, 30 Jan 2019 23:44:12 +0800
Subject: [PATCH 4/5] media: intel-ipu4: [VIRT] Increase MAX_ISYS_VIRT_STREAM
to 35
In UOS, the max number of IPU stream device that been exposed is 34
and SOS created 35 stream devices. By incresing MAX_ISYS_VIRT_STREAM
to 35, UOS expose all the stream devices that been created by SOS.
This enables UOS to do 8 camera concurrent streaming whereas
previously UOS only able to do 7 camera concurrent streaming.
Change-Id: I99cde4a26612a267730451a1503c41c8ddd1fdab
Tracked-On: PKT-1732
Tracked-On: OAM-63788
Tracked-On: OAM-63914
Signed-off-by: Gopal, Puunithaaraj <puunithaaraj.gopal@intel.com>
---
drivers/media/pci/intel/virtio/intel-ipu4-virtio-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/pci/intel/virtio/intel-ipu4-virtio-common.h b/drivers/media/pci/intel/virtio/intel-ipu4-virtio-common.h
index 3edab4270da0..b5cc8dd16b92 100644
--- a/drivers/media/pci/intel/virtio/intel-ipu4-virtio-common.h
+++ b/drivers/media/pci/intel/virtio/intel-ipu4-virtio-common.h
@@ -18,7 +18,7 @@
#define MAX_ENTRY_FE 7
#define MAX_STREAM_DEVICES 64
#define MAX_PIPELINE_DEVICES 1
-#define MAX_ISYS_VIRT_STREAM 34
+#define MAX_ISYS_VIRT_STREAM 35
#define phys_to_page(x) pfn_to_page((x) >> PAGE_SHIFT)
--
2.17.1

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@ -0,0 +1,86 @@
From 1bbc720655a027c33d3fe9b299383b5a359a139c Mon Sep 17 00:00:00 2001
From: kgopala2 <karthik.l.gopalakrishnan@intel.com>
Date: Wed, 30 Jan 2019 01:41:06 +0800
Subject: [PATCH 5/5] media: i2c: ici: fix for NULL pointer deref in max9286
driver
During enumeration MAXIM9286 bridge and sensors, the function
init_ext_sd was leading in to a NULL pointer derefernce which got
introduced due to final code cleanup for PKT merge. This change
fixes the NULL pointer dereference.
Change-Id: Id8521eb90af335a18be88ff813f91c74a93bfe5d
Tracked-On: PKT-1732
Tracked-On: OLINUX-3050
Tracked-On: OAM-65034
Signed-off-by: kgopala2 <karthik.l.gopalakrishnan@intel.com>
---
drivers/media/i2c/ici/max9286_ici.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/media/i2c/ici/max9286_ici.c b/drivers/media/i2c/ici/max9286_ici.c
index 3400cc11946f..4345c705b081 100644
--- a/drivers/media/i2c/ici/max9286_ici.c
+++ b/drivers/media/i2c/ici/max9286_ici.c
@@ -486,17 +486,20 @@ static int max9286_get_selection(struct ici_isys_node *node, struct ici_pad_sele
static int init_ext_sd(struct i2c_client *client, struct max9286_subdev *max_sd, int idx)
{
- struct max9286 *max;
+ struct max9286 *maxim;
int rval;
char name[ICI_MAX_NODE_NAME];
struct ici_ext_subdev *subdev;
- max = to_max_9286(subdev);
subdev = i2c_get_clientdata(client);
+ if (!subdev) {
+ return -EINVAL;
+ }
+ maxim = to_max_9286(subdev);
snprintf(name, sizeof(name), "MAX9286 %d", idx);
- strncpy(max->sub_devs[idx].sd_name, name, sizeof(name));
+ strncpy(maxim->sub_devs[idx].sd_name, name, sizeof(name));
max_sd->sd->client = client;
max_sd->sd->num_pads = 2;
@@ -510,11 +513,11 @@ static int init_ext_sd(struct i2c_client *client, struct max9286_subdev *max_sd,
max_sd->sd->set_param = max9286_set_param; // meant to execute CTRL-IDs/CIDs
max_sd->sd->get_param = max9286_get_param; // meant to execute CTRLIDs/CIDs
max_sd->sd->get_menu_item = max9286_get_menu_item; // get LINK FREQ
- if (max->reg.setup_node) {
- rval = max->reg.setup_node(max->reg.ipu_data,
- max_sd->sd, name);
- if (rval)
- return rval;
+ if (maxim->reg.setup_node) {
+ rval = maxim->reg.setup_node(maxim->reg.ipu_data,
+ max_sd->sd, name);
+ if (rval)
+ return rval;
} else {
pr_err("node not registered\n");
}
@@ -653,7 +656,7 @@ static int max9286_registered(struct ici_ext_subdev_register *reg)
sd = &max->sub_devs[k];
rval = init_ext_sd(max->ici_sd.client, sd, k);
if (rval)
- return rval;
+ return rval;
rval = sd_register.create_link(&sensor_sd->node,
sensor_sd->src_pad,
@@ -987,7 +990,7 @@ static int max9286_probe(struct i2c_client *client,
if (client->dev.platform_data == NULL)
return -ENODEV;
- dev_err(&client->dev, "MAX9286 probe!\n");
+ dev_info(&client->dev, "MAX9286 probe!\n");
max = devm_kzalloc(&client->dev, sizeof(*max), GFP_KERNEL);
if (!max)
return -ENOMEM;
--
2.17.1

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@ -17,8 +17,8 @@ Name: linux-iot-lts2018
Version: 4.19.20
# upstream number is the number from PKT it consist in
# YYMMDDHHMM a 10 length number
%global upstreamnumber 1902140909
Release: 15
%global upstreamnumber 1902162344
Release: 16
License: GPL-2.0
Summary: The Linux kernel
Url: http://www.kernel.org/
@ -32,8 +32,8 @@ Source5: fragment-sos
# quilt.url: https://github.com/intel/linux-intel-quilt
# quilt.branch: 4.19/base
# quilt.tag: lts-v4.19.20-base-190214T090914Z
# config.tag: lts-v4.19.20-base-190214T090914Z
# quilt.tag: lts-v4.19.20-base-190216T234416Z
# config.tag: lts-v4.19.20-base-190216T234416Z
%define ktarget0 iot-lts2018
%define kversion0 %{version}-%{release}.%{ktarget0}
@ -1046,6 +1046,11 @@ Patch0993: 0993-iommu-vt-d-Added-option-to-disable-BXT-IPU.patch
Patch0994: 0994-af_key-unconditionally-clone-on-broadcast.patch
Patch0995: 0995-mfd-intel-lpss-Set-the-device-in-reset-stat.patch
Patch0996: 0996-BXT-Workaround-for-HW-bug-data-loss-in-16-1.patch
Patch0997: 0997-drm-i915-gvt-Refine-the-snapshort-range-of-.patch
Patch0998: 0998-drm-i915-gvt-optimize-the-oos-memory-setup.patch
Patch0999: 0999-drm-i915-gvt-limit-the-active-perf-on-BXT-p.patch
Patch1000: 1000-media-intel-ipu4-VIRT-Increase-MAX_ISYS_VIR.patch
Patch1001: 1001-media-i2c-ici-fix-for-NULL-pointer-deref-in.patch
#END XXXX: PK Series
# Clear Linux Series
@ -2097,6 +2102,11 @@ Linux kernel build files and install script
%patch0994 -p1
%patch0995 -p1
%patch0996 -p1
%patch0997 -p1
%patch0998 -p1
%patch0999 -p1
%patch1000 -p1
%patch1001 -p1
# End XXXX PK Series
# Clear Linux Series

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@ -1 +1 @@
15
16