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update to PKT lts-v4.19.28-base-190312T084846Z 

Signed-off-by: Alek Du <alek.du@intel.com>
This commit is contained in:
Alek Du 2019-03-13 10:50:07 +00:00
parent 812f0fb15a
commit 301b91cefc
9 changed files with 516 additions and 5 deletions
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36
1038-TSC-Print-current-tsc-value-when-detected.patch Normal file
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@ -0,0 +1,36 @@
From 2cab91d7c661c72990d49237ea7e7a5666b1fb6e Mon Sep 17 00:00:00 2001
From: Wang Chaox <chaox.m.wang@intel.com>
Date: Fri, 22 Feb 2019 15:18:23 +0800
Subject: [PATCH 1/7] TSC: Print current tsc value when detected
It's a critical KPI of system cold-boot time. This patch prints the
current tsc value which is used to align the kernel time with natural
time.
Change-Id: Id3a359d069b26f2b3b2988e7f64af5daf51e0718
Tracked-On: PKT-1761
Signed-off-by: Wang Chaox <chaox.m.wang@intel.com>
---
arch/x86/kernel/tsc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 6d5dc5dabfd7..bdc2c236fed3 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1407,9 +1407,10 @@ static bool __init determine_cpu_tsc_frequencies(bool early)
(unsigned long)cpu_khz % KHZ);
if (cpu_khz != tsc_khz) {
- pr_info("Detected %lu.%03lu MHz TSC",
+ pr_info("Detected %lu.%03lu MHz TSC, current tsc:%llu",
(unsigned long)tsc_khz / KHZ,
- (unsigned long)tsc_khz % KHZ);
+ (unsigned long)tsc_khz % KHZ,
+ rdtsc());
}
return true;
}
--
2.17.1

77
1039-keystore-add-iv_size-restriction-for-dal-ke.patch Normal file
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@ -0,0 +1,77 @@
From c8b650b3d3d969c640506c25419c411de3405921 Mon Sep 17 00:00:00 2001
From: Iulian Mocanu <iulian.mocanu@intel.com>
Date: Fri, 22 Feb 2019 15:44:55 +0100
Subject: [PATCH 2/7] keystore: add iv_size restriction for dal-keystore
Dal-keystore support only 12-byte IV for AES-GCM algorithms
to promote interoperability, efficiency, and simplicity of design.
Restriction is related to GCM recommandation for situations in
which efficiency is critical.
Change-Id: I3829684ee322eefeffc6b3620061f2a8ac97b205
Signed-off-by: Iulian Mocanu <iulian.mocanu@intel.com>
Tracked-On: PKT-1776
Signed-off-by: Zhou Furong <furong.zhou@intel.com>
---
security/keystore/api_dal.c | 11 +++--------
security/keystore/dal_client.h | 6 ++++++
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/security/keystore/api_dal.c b/security/keystore/api_dal.c
index 3a6b1c24de26..8dbba4da7223 100644
--- a/security/keystore/api_dal.c
+++ b/security/keystore/api_dal.c
@@ -798,15 +798,12 @@ int dal_keystore_encrypt(const uint8_t *client_ticket, int slot_id,
": keystore_encrypt slot_id=%d algo_spec=%d iv_size=%u isize=%u\n",
slot_id, (int)algo_spec, iv_size, input_size);
- if (!iv || iv_size < DAL_KEYSTORE_GCM_IV_SIZE ||
- iv_size > KEYSTORE_MAX_IV_SIZE) {
- ks_err(KBUILD_MODNAME ": Incorrect input values to %s\n",
+ if (!iv || iv_size != DAL_KEYSTORE_GCM_IV_SIZE) {
+ ks_err(KBUILD_MODNAME ": Incorrect input values to %s\n",
__func__);
return -EINVAL;
}
- iv_size = DAL_KEYSTORE_GCM_IV_SIZE;
-
res = dal_calc_clientid(client_id, sizeof(client_id));
if (res) {
@@ -952,14 +949,12 @@ int dal_keystore_decrypt(const uint8_t *client_ticket, int slot_id,
": keystore_decrypt slot_id=%d algo_spec=%d iv_size=%u isize=%u\n",
slot_id, (int)algo_spec, iv_size, input_size);
- if (!iv || iv_size < DAL_KEYSTORE_GCM_IV_SIZE || iv_size > KEYSTORE_MAX_IV_SIZE) {
+ if (!iv || iv_size != DAL_KEYSTORE_GCM_IV_SIZE) {
ks_err(KBUILD_MODNAME ": Incorrect input values to %s\n",
__func__);
return -EINVAL;
}
- iv_size = DAL_KEYSTORE_GCM_IV_SIZE;
-
res = dal_calc_clientid(client_id, sizeof(client_id));
if (res) {
diff --git a/security/keystore/dal_client.h b/security/keystore/dal_client.h
index 059c919cfabe..cce8ab560231 100644
--- a/security/keystore/dal_client.h
+++ b/security/keystore/dal_client.h
@@ -22,6 +22,12 @@
#include <linux/errno.h>
#include <security/keystore_api_common.h>
+/**
+ * DAL_KEYSTORE_GCM_IV_SIZE - size of the Initialization Vector
+ *
+ * Dal-keystore supports only 12-byte IV for AES-GCM algorithms
+ * to promote interoperability, efficiency, and simplicity of design.
+ */
#define DAL_KEYSTORE_GCM_IV_SIZE 12
#define DAL_KEYSTORE_GCM_AUTH_SIZE 16
#define DAL_KEYSTORE_MAX_WRAP_KEY_LEN 49
--
2.17.1

123
1040-drm-i915-add-lock-to-avoid-racing-of-pvmmio.patch Normal file
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@ -0,0 +1,123 @@
From e954e0ce9844f08980704c3aa738477a90675503 Mon Sep 17 00:00:00 2001
From: "He, Min" <min.he@intel.com>
Date: Mon, 4 Mar 2019 07:41:04 +0000
Subject: [PATCH 3/7] drm/i915: add lock to avoid racing of pvmmio operations
for GVT-g guest
When GVT-g guest using PV method to update the GGTT or PPGTT table,
there's no lock protection, which means two threads may update the PV
info at the same time. This will leads to missing update of some
entries of GGTT or PPGTT table.
This patch added locks for PV update of GGTT and PPGTT tables to fix
the issues mentioned above.
Change-Id: Ib8ffe978a047414681506024700920d72483756e
Tracked-On: projectacrn/acrn-hypervisor#2674
Signed-off-by: Min He <min.he@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Tracked-On: PKT-1748
---
drivers/gpu/drm/i915/i915_drv.c | 2 ++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++++++++
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c7f4f94fd49b..cdeddddf35d1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -899,6 +899,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
spin_lock_init(&dev_priv->irq_lock);
spin_lock_init(&dev_priv->shared_page_lock);
+ spin_lock_init(&dev_priv->pvmmio_gtt_lock);
+ spin_lock_init(&dev_priv->pvmmio_ppgtt_lock);
spin_lock_init(&dev_priv->gpu_error.lock);
mutex_init(&dev_priv->backlight_lock);
spin_lock_init(&dev_priv->uncore.lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 03352f37b72a..6d56078608bb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1611,6 +1611,8 @@ struct drm_i915_private {
void __iomem *regs;
struct gvt_shared_page *shared_page;
spinlock_t shared_page_lock;
+ spinlock_t pvmmio_gtt_lock;
+ spinlock_t pvmmio_ppgtt_lock;
struct intel_uncore uncore;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 627921fa8ee9..032e7705e6e3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1019,10 +1019,12 @@ static void gen8_ppgtt_clear_4lvl(struct i915_address_space *vm,
struct pv_ppgtt_update *pv_ppgtt =
&dev_priv->shared_page->pv_ppgtt;
+ spin_lock(&dev_priv->pvmmio_ppgtt_lock);
writeq(px_dma(pml4), &pv_ppgtt->pdp);
writeq(orig_start, &pv_ppgtt->start);
writeq(orig_length, &pv_ppgtt->length);
I915_WRITE(vgtif_reg(g2v_notify), VGT_G2V_PPGTT_L4_CLEAR);
+ spin_unlock(&dev_priv->pvmmio_ppgtt_lock);
}
}
@@ -1268,11 +1270,13 @@ static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
struct pv_ppgtt_update *pv_ppgtt =
&dev_priv->shared_page->pv_ppgtt;
+ spin_lock(&dev_priv->pvmmio_ppgtt_lock);
writeq(px_dma(&ppgtt->pml4), &pv_ppgtt->pdp);
writeq(vma->node.start, &pv_ppgtt->start);
writeq(vma->node.size, &pv_ppgtt->length);
writel(cache_level, &pv_ppgtt->cache_level);
I915_WRITE(vgtif_reg(g2v_notify), VGT_G2V_PPGTT_L4_INSERT);
+ spin_unlock(&dev_priv->pvmmio_ppgtt_lock);
}
vma->page_sizes.gtt = I915_GTT_PAGE_SIZE;
@@ -1546,10 +1550,12 @@ static int gen8_ppgtt_alloc_4lvl(struct i915_address_space *vm,
struct pv_ppgtt_update *pv_ppgtt =
&dev_priv->shared_page->pv_ppgtt;
+ spin_lock(&dev_priv->pvmmio_ppgtt_lock);
writeq(px_dma(pml4), &pv_ppgtt->pdp);
writeq(orig_start, &pv_ppgtt->start);
writeq(orig_length, &pv_ppgtt->length);
I915_WRITE(vgtif_reg(g2v_notify), VGT_G2V_PPGTT_L4_ALLOC);
+ spin_unlock(&dev_priv->pvmmio_ppgtt_lock);
}
return 0;
@@ -2517,10 +2523,12 @@ static void vgpu_ggtt_insert(struct drm_i915_private *dev_priv,
{
struct gvt_shared_page *shared_page = dev_priv->shared_page;
+ spin_lock(&dev_priv->pvmmio_gtt_lock);
writeq(start, &shared_page->pv_ggtt.start);
writeq(num_entries, &shared_page->pv_ggtt.length);
writel(level, &shared_page->pv_ggtt.cache_level);
I915_WRITE(vgtif_reg(g2v_notify), VGT_G2V_GGTT_INSERT);
+ spin_unlock(&dev_priv->pvmmio_gtt_lock);
}
static void gen8_ggtt_insert_page(struct i915_address_space *vm,
@@ -2656,9 +2664,11 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm,
struct drm_i915_private *dev_priv = vm->i915;
struct gvt_shared_page *shared_page = dev_priv->shared_page;
+ spin_lock(&dev_priv->pvmmio_gtt_lock);
writeq(start, &shared_page->pv_ggtt.start);
writeq(length, &shared_page->pv_ggtt.length);
I915_WRITE(vgtif_reg(g2v_notify), VGT_G2V_GGTT_CLEAR);
+ spin_unlock(&dev_priv->pvmmio_gtt_lock);
}
}
--
2.17.1

105
1041-media-intel-ipu4-crlmodule-lite-adv7481_cvb.patch Normal file
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@ -0,0 +1,105 @@
From 672b75fa129256fdab99ad5db334766adbfea0f5 Mon Sep 17 00:00:00 2001
From: kgopala2 <karthik.l.gopalakrishnan@intel.com>
Date: Fri, 4 Jan 2019 02:26:39 +0800
Subject: [PATCH 4/7] media: intel-ipu4: crlmodule-lite: adv7481_cvbs: Add PAL
size
Add vertical resolution of 288 rows of PAL in addition
to 240 rows
Change-Id: I5d710e279a14dcd913e731fa008f9159f8167702
Tracked-On: OAM-76780
Tracked-On: OOLI2-2854
Tracked-On: OAM-65015
Tracked-On: OLINUX-3028
Signed-off-by: kgopala2 <karthik.l.gopalakrishnan@intel.com>
---
.../crl_adv7481_cvbs_configuration.h | 42 +++++++++++++++++--
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/media/i2c/crlmodule-lite/crl_adv7481_cvbs_configuration.h b/drivers/media/i2c/crlmodule-lite/crl_adv7481_cvbs_configuration.h
index b077c5cb09c4..afd27c2580fe 100644
--- a/drivers/media/i2c/crlmodule-lite/crl_adv7481_cvbs_configuration.h
+++ b/drivers/media/i2c/crlmodule-lite/crl_adv7481_cvbs_configuration.h
@@ -107,18 +107,18 @@ static struct crl_subdev_rect_rep adv7481_cvbs_ntsc_rects[] = {
.in_rect.left = 0,
.in_rect.top = 0,
.in_rect.width = 720,
- .in_rect.height = 240,
+ .in_rect.height = 288,
.out_rect.left = 0,
.out_rect.top = 0,
.out_rect.width = 720,
- .out_rect.height = 240,
+ .out_rect.height = 288,
},
{
.subdev_type = CRL_SUBDEV_TYPE_BINNER,
.in_rect.left = 0,
.in_rect.top = 0,
.in_rect.width = 720,
- .in_rect.height = 240,
+ .in_rect.height = 288,
.out_rect.left = 0,
.out_rect.top = 0,
.out_rect.width = 720,
@@ -126,6 +126,31 @@ static struct crl_subdev_rect_rep adv7481_cvbs_ntsc_rects[] = {
},
};
+static struct crl_subdev_rect_rep adv7481_cvbs_pal_rects[] = {
+ {
+ .subdev_type = CRL_SUBDEV_TYPE_PIXEL_ARRAY,
+ .in_rect.left = 0,
+ .in_rect.top = 0,
+ .in_rect.width = 720,
+ .in_rect.height = 288,
+ .out_rect.left = 0,
+ .out_rect.top = 0,
+ .out_rect.width = 720,
+ .out_rect.height = 288,
+ },
+ {
+ .subdev_type = CRL_SUBDEV_TYPE_BINNER,
+ .in_rect.left = 0,
+ .in_rect.top = 0,
+ .in_rect.width = 720,
+ .in_rect.height = 288,
+ .out_rect.left = 0,
+ .out_rect.top = 0,
+ .out_rect.width = 720,
+ .out_rect.height = 288,
+ },
+};
+
static struct crl_mode_rep adv7481_cvbs_modes[] = {
{
.sd_rects_items = ARRAY_SIZE(adv7481_cvbs_ntsc_rects),
@@ -140,6 +165,15 @@ static struct crl_mode_rep adv7481_cvbs_modes[] = {
.mode_regs_items = 0,
.mode_regs = 0,
},
+ {
+ .sd_rects_items = ARRAY_SIZE(adv7481_cvbs_pal_rects),
+ .sd_rects = adv7481_cvbs_pal_rects,
+ .binn_hor = 1,
+ .binn_vert = 1,
+ .scale_m = 1,
+ .width = 720,
+ .height = 288,
+ },
};
static struct crl_sensor_subdev_config adv7481_cvbs_sensor_subdevs[] = {
@@ -157,7 +191,7 @@ static struct crl_sensor_limits adv7481_cvbs_sensor_limits = {
.x_addr_min = 0,
.y_addr_min = 0,
.x_addr_max = 720,
- .y_addr_max = 240,
+ .y_addr_max = 288,
.min_frame_length_lines = 160,
.max_frame_length_lines = 65535,
.min_line_length_pixels = 6024,
--
2.17.1

44
1042-kernel-vhm-Add-some-debugs-to-print-the-cli.patch Normal file
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@ -0,0 +1,44 @@
From 63b9a9614e31f9d032546d62bd4966bae2698e3c Mon Sep 17 00:00:00 2001
From: Zhao Yakui <yakui.zhao@intel.com>
Date: Fri, 8 Mar 2019 16:59:32 +0800
Subject: [PATCH 5/7] kernel/vhm:Add some debugs to print the client id/name
for create/destroy ioreq_client
Currently the client id is printed when one ioreq_client is created.
But it is difficult to know who is using the client based on client_id.
The client name is meaningful. At the same time the info is also printed
when ioreq client is destroyed.
Tracked-On: PKT-1797
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/vhm/vhm_ioreq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/vhm/vhm_ioreq.c b/drivers/vhm/vhm_ioreq.c
index 8b46f43aaec8..3647d1ef1962 100644
--- a/drivers/vhm/vhm_ioreq.c
+++ b/drivers/vhm/vhm_ioreq.c
@@ -257,7 +257,7 @@ int acrn_ioreq_create_client(unsigned long vmid, ioreq_handler_t handler,
list_add(&client->list, &vm->ioreq_client_list);
spin_unlock_bh(&vm->ioreq_client_lock);
- pr_info("vhm-ioreq: created ioreq client %d\n", client_id);
+ pr_info("vhm-ioreq: created ioreq client %d for %s\n", client_id, name);
return client_id;
}
@@ -402,6 +402,9 @@ void acrn_ioreq_destroy_client(int client_id)
if (!client)
return;
+ pr_info("vhm-ioreq: destroy ioreq client %d for %s\n",
+ client->id, client->name);
+
might_sleep();
acrn_ioreq_destroy_client_pervm(client, client->ref_vm);
--
2.17.1

41
1043-drm-i915-gvt-handles-error-when-ioreq-attac.patch Normal file
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@ -0,0 +1,41 @@
From b276798110420e6dc9863de069536612fba36188 Mon Sep 17 00:00:00 2001
From: He Min <min.he@intel.com>
Date: Fri, 8 Mar 2019 08:13:08 +0000
Subject: [PATCH 6/7] drm/i915/gvt: handles error when ioreq attach client
fails
In case of device model crashes accidentally, VHM will not be
able to attach ioreq client, so acrngt needs to handle this
failure case.
Tracked-On: PKT-1797
Signed-off-by: He Min <min.he@intel.com>
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/gvt/acrngt.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/acrngt.c b/drivers/gpu/drm/i915/gvt/acrngt.c
index 0f1154c8c6a3..e27b53b165aa 100644
--- a/drivers/gpu/drm/i915/gvt/acrngt.c
+++ b/drivers/gpu/drm/i915/gvt/acrngt.c
@@ -237,7 +237,14 @@ static int acrngt_emulation_thread(void *priv)
set_freezable();
while (1) {
- acrn_ioreq_attach_client(info->client, 1);
+ ret = acrn_ioreq_attach_client(info->client, 1);
+
+ if (ret) {
+ gvt_err("error while attach ioreq client %d\n", ret);
+ info->client = 0;
+ info->emulation_thread = NULL;
+ return 0;
+ }
if (kthread_should_stop())
return 0;
--
2.17.1

71
1044-INTERNAL-drm-i915-Additional-alpha-blending.patch Normal file
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@ -0,0 +1,71 @@
From 476b133a825b4b447dacdf938ba24fd59eff25cc Mon Sep 17 00:00:00 2001
From: kimsehun <se.hun.kim@intel.com>
Date: Thu, 7 Mar 2019 03:25:42 -0500
Subject: [PATCH 7/7] INTERNAL drm/i915: Additional alpha blending support
This patch is related with commit id b20815255 and e5fa98aa2
Since INTERNAL version doesn't work with native clear linux.
To fully support alpha blending on native Clear linux,
need to alpha and blending property set on primary plane create
and sprite plane create function.
Hot Fix of - INTERNAL drm/i915: Add plane alpha blending support, v2.
Tracked-On: OLINUX-3689
Tracked-On: PKT-1773
Signed-off-by: kimsehun <se.hun.kim@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
drivers/gpu/drm/i915/intel_sprite.c | 8 ++++++++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index eed5e6add88e..5afd1523d5f6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13884,7 +13884,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
DRM_ERROR("Failed to create decryption property\n");
}
- if (INTEL_GEN(dev_priv) >= 9)
+ if (INTEL_GEN(dev_priv) >= 9) {
drm_plane_create_color_properties(&primary->base,
BIT(DRM_COLOR_YCBCR_BT601) |
BIT(DRM_COLOR_YCBCR_BT709),
@@ -13893,6 +13893,13 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
+ drm_plane_create_alpha_property(&primary->base);
+ drm_plane_create_blend_mode_property(&primary->base,
+ BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+ BIT(DRM_MODE_BLEND_PREMULTI) |
+ BIT(DRM_MODE_BLEND_COVERAGE));
+ }
+
drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
return primary;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 8a013f19fa99..b388a6b5b402 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1755,6 +1755,14 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
+ if (INTEL_GEN(dev_priv) >= 9) {
+ drm_plane_create_alpha_property(&intel_plane->base);
+ drm_plane_create_blend_mode_property(&intel_plane->base,
+ BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+ BIT(DRM_MODE_BLEND_PREMULTI) |
+ BIT(DRM_MODE_BLEND_COVERAGE));
+ }
+
drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
return intel_plane;
--
2.17.1

22
linux-iot-lts2018.spec
View File

@ -17,8 +17,8 @@ Name: linux-iot-lts2018
Version: 4.19.28
# upstream number is the number from PKT it consist in
# YYMMDDHHMM a 10 length number
%global upstreamnumber 1903111150
Release: 27
%global upstreamnumber 1903120848
Release: 28
License: GPL-2.0
Summary: The Linux kernel
Url: http://www.kernel.org/
@ -32,8 +32,8 @@ Source5: fragment-sos
# quilt.url: https://github.com/intel/linux-intel-quilt
# quilt.branch: 4.19/base
# quilt.tag: lts-v4.19.28-base-190311T115000Z
# config.tag: lts-v4.19.28-base-190311T115000Z
# quilt.tag: lts-v4.19.28-base-190312T084846Z
# config.tag: lts-v4.19.28-base-190312T084846Z
%define ktarget0 iot-lts2018
%define kversion0 %{version}-%{release}.%{ktarget0}
@ -1088,6 +1088,13 @@ Patch1034: 1034-media-intel-ipu4-VIRT-Making-poll-req-timeo.patch
Patch1035: 1035-media-intel-ipu4-VIRT-Adding-VBS-dev-reset.patch
Patch1036: 1036-ICI-Adding-delay-after-initializing-OV10635.patch
Patch1037: 1037-media-i2c-ti960-ICI-Enable-TI960-and-OV495-.patch
Patch1038: 1038-TSC-Print-current-tsc-value-when-detected.patch
Patch1039: 1039-keystore-add-iv_size-restriction-for-dal-ke.patch
Patch1040: 1040-drm-i915-add-lock-to-avoid-racing-of-pvmmio.patch
Patch1041: 1041-media-intel-ipu4-crlmodule-lite-adv7481_cvb.patch
Patch1042: 1042-kernel-vhm-Add-some-debugs-to-print-the-cli.patch
Patch1043: 1043-drm-i915-gvt-handles-error-when-ioreq-attac.patch
Patch1044: 1044-INTERNAL-drm-i915-Additional-alpha-blending.patch
#END XXXX: PK Series
# Clear Linux Series
@ -2191,6 +2198,13 @@ Linux kernel build files and install script
%patch1035 -p1
%patch1036 -p1
%patch1037 -p1
%patch1038 -p1
%patch1039 -p1
%patch1040 -p1
%patch1041 -p1
%patch1042 -p1
%patch1043 -p1
%patch1044 -p1
# End XXXX PK Series
# Clear Linux Series

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@ -1 +1 @@
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