2019-09-10 10:09:19 +08:00
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: qianmenx <qianx.meng@intel.com>
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Date: Thu, 16 May 2019 11:22:03 +0800
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Subject: [PATCH] media: intel-ipu4: fix frame counter(x3a) can't work issue
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fix frame counter(x3a) can't work issue
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Change-Id: I7c5b694a1acc44248959be2ed8b16aa390885ab2
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Tracked-On: PKT-2588
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Tracked-On: #JIIAP-791
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Signed-off-by: qianmenx <qianx.meng@intel.com>
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Signed-off-by: Meng Wei <wei.meng@intel.com>
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---
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drivers/media/i2c/crlmodule/crl_ox03a10_common.h | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/media/i2c/crlmodule/crl_ox03a10_common.h b/drivers/media/i2c/crlmodule/crl_ox03a10_common.h
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2020-10-27 02:14:06 +08:00
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index dc7ab02c85bc..1765cb20fa70 100644
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2019-09-10 10:09:19 +08:00
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--- a/drivers/media/i2c/crlmodule/crl_ox03a10_common.h
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+++ b/drivers/media/i2c/crlmodule/crl_ox03a10_common.h
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@@ -529,6 +529,7 @@ static struct crl_register_write_rep ox03a10_1920_1088_12DCG[] = {
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{ 0x384d, CRL_REG_LEN_08BIT, 0x14 },
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{ 0x460a, CRL_REG_LEN_08BIT, 0x0e },
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/* embedded data */
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+ { 0x484c, CRL_REG_LEN_08BIT, 0x02 },
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{ 0x3208, CRL_REG_LEN_08BIT, 0x04 },
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{ 0x483e, CRL_REG_LEN_08BIT, 0x02 },/* frame counter */
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{ 0x3501, CRL_REG_LEN_08BIT, 0x02 },/* DCG exp */
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--
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https://clearlinux.org
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