clear-pkgs-linux-iot-lts2018/0616-drm-i915-gvt-enable-pl...

36 lines
1.2 KiB
Diff
Raw Normal View History

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2018-10-11 02:06:46 +08:00
From: Fei Jiang <fei.jiang@intel.com>
Date: Wed, 29 Aug 2018 12:08:45 +0800
Subject: [PATCH] drm/i915/gvt: enable plane wm pvmmio level through
2018-10-11 02:06:46 +08:00
enable_pvmmio param
plane wm update pvmmio level is 0x4, need set it in enable_pvmmio for both
SOS and UOS kernel driver.
Patch for both SOS and UOS.
V2: use PVMMIO_PLANE_WM_UPDATE bit definition to improve readability
Signed-off-by: Fei Jiang <fei.jiang@intel.com>
Reviewed-by: Min He <min.he@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
2020-10-27 02:14:06 +08:00
index 2e56ea5d7411..28769e6b6837 100644
2018-10-11 02:06:46 +08:00
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -71,7 +71,7 @@ struct drm_printer;
param(int, domain_scaler_owner, 0x11100) \
param(unsigned int, enable_pvmmio, \
PVMMIO_ELSP_SUBMIT | PVMMIO_PLANE_UPDATE \
- | PVMMIO_PPGTT_UPDATE) \
+ | PVMMIO_PLANE_WM_UPDATE | PVMMIO_PPGTT_UPDATE) \
param(bool, enable_gvt, false)
#define MEMBER(T, member, ...) T member;
--
https://clearlinux.org
2018-10-11 02:06:46 +08:00