acrn-kernel/arch/arm/mach-spear
Russell King adf4b00ebf ARM: l2c: spear13xx: remove cache size override
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:50:06 +01:00
..
include/mach
Kconfig ARM: SoC: cleanups for 3.15 2014-04-05 13:51:19 -07:00
Makefile
Makefile.boot
generic.h
headsmp.S Shiraz has moved 2014-04-18 16:40:08 -07:00
hotplug.c
pl080.c
pl080.h
platsmp.c ARM: l2c: avoid calling outer_flush_all() unnecessarily (Spear) 2014-05-22 16:38:38 +01:00
restart.c
spear3xx.c
spear6xx.c
spear13xx.c ARM: l2c: spear13xx: remove cache size override 2014-05-30 00:50:06 +01:00
spear300.c
spear310.c
spear320.c
spear1310.c
spear1340.c
time.c ARM Versatile Express fixes for 3.15 2014-04-24 23:46:58 +02:00