80c4ece67b
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on RZ/G2L (and alike) SoC's so that these can be used in the first cell of interrupt specifiers. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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apple-aic.h | ||
arm-gic.h | ||
aspeed-scu-ic.h | ||
irq-st.h | ||
irq.h | ||
irqc-rzg2l.h | ||
mips-gic.h | ||
mvebu-icu.h |