Dmitry Torokhov e72fab11d3 MIPS: DTS: CI20: fix reset line polarity of the ethernet controller ... commit ca637c0ece upstream. The reset line is called PWRST#, annotated as "active low" in the binding documentation, and is driven low and then high by the driver to reset the chip. However in device tree for CI20 board it was incorrectly marked as "active high". Fix it. Because (as far as I know) the ci20.dts is always built in the kernel I elected not to also add a quirk to gpiolib to force the polarity there. Fixes: db49ca3857 ("net: davicom: dm9000: switch to using gpiod API") Reported-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2022-12-31 13:31:47 +01:00
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dts	MIPS: DTS: CI20: fix reset line polarity of the ethernet controller	2022-12-31 13:31:47 +01:00
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