164 lines
3.8 KiB
C
164 lines
3.8 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/highmem.h>
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#include <linux/unistd.h>
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#include <asm/cacheflush.h>
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#include <asm/cachectl.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/syscalls.h>
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/*
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* If you attempt to flush anything more than this, you need superuser
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* privileges. The value is completely arbitrary.
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*/
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#define CACHEFLUSH_MAX_LEN 1024
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void invalidate_dcache_region(void *start, size_t size)
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{
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unsigned long v, begin, end, linesz, mask;
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linesz = boot_cpu_data.dcache.linesz;
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mask = linesz - 1;
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/* when first and/or last cachelines are shared, flush them
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* instead of invalidating ... never discard valid data!
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*/
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begin = (unsigned long)start;
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end = begin + size;
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if (begin & mask) {
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flush_dcache_line(start);
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begin += linesz;
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}
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if (end & mask) {
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flush_dcache_line((void *)end);
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end &= ~mask;
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}
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/* remaining cachelines only need invalidation */
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for (v = begin; v < end; v += linesz)
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invalidate_dcache_line((void *)v);
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flush_write_buffer();
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}
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void clean_dcache_region(void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = boot_cpu_data.dcache.linesz;
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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clean_dcache_line((void *)v);
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flush_write_buffer();
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}
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void flush_dcache_region(void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = boot_cpu_data.dcache.linesz;
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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flush_dcache_line((void *)v);
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flush_write_buffer();
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}
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void invalidate_icache_region(void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = boot_cpu_data.icache.linesz;
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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invalidate_icache_line((void *)v);
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}
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static inline void __flush_icache_range(unsigned long start, unsigned long end)
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{
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unsigned long v, linesz;
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linesz = boot_cpu_data.dcache.linesz;
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for (v = start; v < end; v += linesz) {
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clean_dcache_line((void *)v);
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invalidate_icache_line((void *)v);
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}
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flush_write_buffer();
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}
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/*
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* This one is called after a module has been loaded.
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*/
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void flush_icache_range(unsigned long start, unsigned long end)
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{
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unsigned long linesz;
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linesz = boot_cpu_data.dcache.linesz;
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__flush_icache_range(start & ~(linesz - 1),
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(end + linesz - 1) & ~(linesz - 1));
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}
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EXPORT_SYMBOL(flush_icache_range);
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/*
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* This one is called from __do_fault() and do_swap_page().
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*/
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void flush_icache_page(struct vm_area_struct *vma, struct page *page)
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{
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if (vma->vm_flags & VM_EXEC) {
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void *v = page_address(page);
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__flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE);
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}
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}
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asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len)
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{
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int ret;
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if (len > CACHEFLUSH_MAX_LEN) {
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ret = -EPERM;
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if (!capable(CAP_SYS_ADMIN))
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goto out;
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}
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ret = -EFAULT;
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if (!access_ok(VERIFY_WRITE, addr, len))
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goto out;
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switch (operation) {
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case CACHE_IFLUSH:
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flush_icache_range((unsigned long)addr,
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(unsigned long)addr + len);
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ret = 0;
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break;
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default:
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ret = -EINVAL;
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}
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out:
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return ret;
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}
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long vaddr, void *dst, const void *src,
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unsigned long len)
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{
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memcpy(dst, src, len);
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if (vma->vm_flags & VM_EXEC)
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flush_icache_range((unsigned long)dst,
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(unsigned long)dst + len);
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}
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