167 lines
4.4 KiB
C
167 lines
4.4 KiB
C
/*
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* Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2012-2013 Xilinx, Inc.
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/bug.h>
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#include "../../drivers/irqchip/irqchip.h"
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static void __iomem *intc_baseaddr;
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/* No one else should require these constants, so define them locally here. */
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#define ISR 0x00 /* Interrupt Status Register */
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#define IPR 0x04 /* Interrupt Pending Register */
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#define IER 0x08 /* Interrupt Enable Register */
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#define IAR 0x0c /* Interrupt Acknowledge Register */
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#define SIE 0x10 /* Set Interrupt Enable bits */
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#define CIE 0x14 /* Clear Interrupt Enable bits */
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#define IVR 0x18 /* Interrupt Vector Register */
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#define MER 0x1c /* Master Enable Register */
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#define MER_ME (1<<0)
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#define MER_HIE (1<<1)
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static void intc_enable_or_unmask(struct irq_data *d)
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{
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unsigned long mask = 1 << d->hwirq;
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pr_debug("enable_or_unmask: %ld\n", d->hwirq);
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/* ack level irqs because they can't be acked during
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* ack function since the handle_level_irq function
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* acks the irq before calling the interrupt handler
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*/
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if (irqd_is_level_type(d))
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out_be32(intc_baseaddr + IAR, mask);
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out_be32(intc_baseaddr + SIE, mask);
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}
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static void intc_disable_or_mask(struct irq_data *d)
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{
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pr_debug("disable: %ld\n", d->hwirq);
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out_be32(intc_baseaddr + CIE, 1 << d->hwirq);
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}
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static void intc_ack(struct irq_data *d)
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{
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pr_debug("ack: %ld\n", d->hwirq);
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out_be32(intc_baseaddr + IAR, 1 << d->hwirq);
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}
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static void intc_mask_ack(struct irq_data *d)
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{
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unsigned long mask = 1 << d->hwirq;
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pr_debug("disable_and_ack: %ld\n", d->hwirq);
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out_be32(intc_baseaddr + CIE, mask);
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out_be32(intc_baseaddr + IAR, mask);
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}
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static struct irq_chip intc_dev = {
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.name = "Xilinx INTC",
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.irq_unmask = intc_enable_or_unmask,
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.irq_mask = intc_disable_or_mask,
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.irq_ack = intc_ack,
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.irq_mask_ack = intc_mask_ack,
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};
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static struct irq_domain *root_domain;
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unsigned int get_irq(void)
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{
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unsigned int hwirq, irq = -1;
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hwirq = in_be32(intc_baseaddr + IVR);
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if (hwirq != -1U)
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irq = irq_find_mapping(root_domain, hwirq);
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pr_debug("get_irq: hwirq=%d, irq=%d\n", hwirq, irq);
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return irq;
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}
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static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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u32 intr_mask = (u32)d->host_data;
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if (intr_mask & (1 << hw)) {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_edge_irq, "edge");
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irq_clear_status_flags(irq, IRQ_LEVEL);
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} else {
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irq_set_chip_and_handler_name(irq, &intc_dev,
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handle_level_irq, "level");
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irq_set_status_flags(irq, IRQ_LEVEL);
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}
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return 0;
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}
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static const struct irq_domain_ops xintc_irq_domain_ops = {
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.xlate = irq_domain_xlate_onetwocell,
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.map = xintc_map,
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};
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static int __init xilinx_intc_of_init(struct device_node *intc,
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struct device_node *parent)
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{
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u32 nr_irq, intr_mask;
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int ret;
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intc_baseaddr = of_iomap(intc, 0);
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BUG_ON(!intc_baseaddr);
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ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &nr_irq);
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if (ret < 0) {
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pr_err("%s: unable to read xlnx,num-intr-inputs\n", __func__);
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return -EINVAL;
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}
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ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &intr_mask);
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if (ret < 0) {
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pr_err("%s: unable to read xlnx,kind-of-intr\n", __func__);
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return -EINVAL;
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}
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if (intr_mask > (u32)((1ULL << nr_irq) - 1))
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pr_info(" ERROR: Mismatch in kind-of-intr param\n");
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pr_info("%s: num_irq=%d, edge=0x%x\n",
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intc->full_name, nr_irq, intr_mask);
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/*
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* Disable all external interrupts until they are
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* explicity requested.
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*/
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out_be32(intc_baseaddr + IER, 0);
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/* Acknowledge any pending interrupts just in case. */
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out_be32(intc_baseaddr + IAR, 0xffffffff);
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/* Turn on the Master Enable. */
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out_be32(intc_baseaddr + MER, MER_HIE | MER_ME);
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/* Yeah, okay, casting the intr_mask to a void* is butt-ugly, but I'm
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* lazy and Michal can clean it up to something nicer when he tests
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* and commits this patch. ~~gcl */
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root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops,
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(void *)intr_mask);
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irq_set_default_host(root_domain);
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return 0;
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}
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IRQCHIP_DECLARE(xilinx_intc, "xlnx,xps-intc-1.00.a", xilinx_intc_of_init);
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