acrn-kernel/drivers/clk/sunxi-ng
Jernej Skrabec 67ee606a6b clk: sunxi-ng: a64: Allow parent change for VE clock
Cedrus driver wants to set VE clock higher than it's possible without
changing parent rate.

Allow changing parent rate for VE clock, so clock rate can be set
freely.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-10 11:19:26 -08:00
..
Kconfig clk: sunxi-ng: add support for suniv F1C100s SoC 2018-12-04 08:41:13 +01:00
Makefile clk: sunxi-ng: add support for suniv F1C100s SoC 2018-12-04 08:41:13 +01:00
ccu-sun4i-a10.c clk: sunxi-ng: sun4i: Set VCO and PLL bias current to lowest setting 2018-09-07 10:20:50 +02:00
ccu-sun4i-a10.h
ccu-sun5i.c
ccu-sun5i.h
ccu-sun6i-a31.c
ccu-sun6i-a31.h
ccu-sun8i-a23-a33.h
ccu-sun8i-a23.c
ccu-sun8i-a33.c clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks 2018-12-05 12:08:20 +01:00
ccu-sun8i-a83t.c clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs 2018-08-27 09:18:11 +02:00
ccu-sun8i-a83t.h
ccu-sun8i-de2.c clk: sunxi-ng: Add support for H6 DE3 clocks 2018-11-05 10:22:50 +01:00
ccu-sun8i-de2.h clk: sunxi-ng: Add support for H6 DE3 clocks 2018-11-05 10:22:50 +01:00
ccu-sun8i-h3.c clk: sunxi-ng: h3: Allow parent change for ve clock 2018-12-04 08:43:58 +01:00
ccu-sun8i-h3.h
ccu-sun8i-r.c
ccu-sun8i-r.h
ccu-sun8i-r40.c clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output 2018-11-30 11:54:39 +08:00
ccu-sun8i-r40.h
ccu-sun8i-v3s.c
ccu-sun8i-v3s.h
ccu-sun9i-a80-de.c
ccu-sun9i-a80-de.h
ccu-sun9i-a80-usb.c
ccu-sun9i-a80-usb.h
ccu-sun9i-a80.c
ccu-sun9i-a80.h
ccu-sun50i-a64.c clk: sunxi-ng: a64: Allow parent change for VE clock 2018-12-10 11:19:26 -08:00
ccu-sun50i-a64.h dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro 2018-09-05 09:19:59 +02:00
ccu-sun50i-h6-r.c
ccu-sun50i-h6-r.h
ccu-sun50i-h6.c clk: sunxi-ng: h6: Set video PLLs limits 2018-11-05 10:21:43 +01:00
ccu-sun50i-h6.h
ccu-suniv-f1c100s.c clk: sunxi-ng: add support for suniv F1C100s SoC 2018-12-04 08:41:13 +01:00
ccu-suniv-f1c100s.h clk: sunxi-ng: add support for suniv F1C100s SoC 2018-12-04 08:41:13 +01:00
ccu_common.c
ccu_common.h
ccu_div.c
ccu_div.h
ccu_frac.c
ccu_frac.h
ccu_gate.c
ccu_gate.h
ccu_mmc_timing.c
ccu_mp.c clk: sunxi-ng: Adjust MP clock parent rate when allowed 2018-11-05 10:21:01 +01:00
ccu_mp.h
ccu_mult.c
ccu_mult.h
ccu_mux.c
ccu_mux.h
ccu_nk.c
ccu_nk.h
ccu_nkm.c
ccu_nkm.h
ccu_nkmp.c clk: sunxi-ng: nkmp: Add constraint for maximum rate 2018-08-27 09:18:10 +02:00
ccu_nkmp.h clk: sunxi-ng: nkmp: Add constraint for maximum rate 2018-08-27 09:18:10 +02:00
ccu_nm.c clk: sunxi-ng: Use u64 for calculation of NM rate 2018-11-05 10:21:29 +01:00
ccu_nm.h clk: sunxi-ng: Add maximum rate constraint to NM PLLs 2018-08-27 09:18:01 +02:00
ccu_phase.c
ccu_phase.h
ccu_reset.c
ccu_reset.h
ccu_sdm.c
ccu_sdm.h