91 lines
2.2 KiB
ArmAsm
91 lines
2.2 KiB
ArmAsm
/*
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* Not really prom support code (yet), but sort of anti-prom code. The current
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* bootloader does a number of things it shouldn't and doesn't do things that it
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* should. The stuff in here is mainly a hodge-podge collection of setup code
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* to get the board up and running.
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* ---Dan
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*/
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#include <asm/reg.h>
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#include <asm/page.h>
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#include <platforms/gemini.h>
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#include <asm/ppc_asm.h>
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/*
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* On 750's the MMU is on when Linux is booted, so we need to clear out the
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* bootloader's BAT settings, make sure we're in supervisor state (gotcha!),
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* and turn off the MMU.
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*
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*/
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_GLOBAL(gemini_prom_init)
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#ifdef CONFIG_SMP
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/* Since the MMU's on, get stuff in rom space that we'll need */
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lis r4,GEMINI_CPUSTAT@h
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ori r4,r4,GEMINI_CPUSTAT@l
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lbz r5,0(r4)
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andi. r5,r5,3
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mr r24,r5 /* cpu # used later on */
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#endif
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mfmsr r4
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li r3,MSR_PR /* ensure supervisor! */
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ori r3,r3,MSR_IR|MSR_DR
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andc r4,r4,r3
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mtmsr r4
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isync
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#if 0
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/* zero out the bats now that the MMU is off */
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prom_no_mmu:
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li r3,0
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mtspr SPRN_IBAT0U,r3
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mtspr SPRN_IBAT0L,r3
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mtspr SPRN_IBAT1U,r3
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mtspr SPRN_IBAT1L,r3
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mtspr SPRN_IBAT2U,r3
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mtspr SPRN_IBAT2L,r3
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mtspr SPRN_IBAT3U,r3
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mtspr SPRN_IBAT3L,r3
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mtspr SPRN_DBAT0U,r3
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mtspr SPRN_DBAT0L,r3
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mtspr SPRN_DBAT1U,r3
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mtspr SPRN_DBAT1L,r3
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mtspr SPRN_DBAT2U,r3
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mtspr SPRN_DBAT2L,r3
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mtspr SPRN_DBAT3U,r3
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mtspr SPRN_DBAT3L,r3
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#endif
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/* the bootloader (as far as I'm currently aware) doesn't mess with page
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tables, but since we're already here, might as well zap these, too */
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li r4,0
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mtspr SPRN_SDR1,r4
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li r4,16
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mtctr r4
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li r3,0
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li r4,0
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3: mtsrin r3,r4
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addi r3,r3,1
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bdnz 3b
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#ifdef CONFIG_SMP
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/* The 750 book (and Mot/IBM support) says that this will "assist" snooping
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when in SMP. Not sure yet whether this should stay or leave... */
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mfspr r4,SPRN_HID0
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ori r4,r4,HID0_ABE
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mtspr SPRN_HID0,r4
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sync
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#endif /* CONFIG_SMP */
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blr
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/* apparently, SMon doesn't pay attention to HID0[SRST]. Disable the MMU and
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branch to 0xfff00100 */
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_GLOBAL(_gemini_reboot)
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lis r5,GEMINI_BOOT_INIT@h
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ori r5,r5,GEMINI_BOOT_INIT@l
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li r6,MSR_IP
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mtspr SPRN_SRR0,r5
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mtspr SPRN_SRR1,r6
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rfi
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