63 lines
2.1 KiB
C
63 lines
2.1 KiB
C
/*
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* include/asm-v850/v850e_utils.h -- Utility functions associated with
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* V850E CPUs
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*
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* Copyright (C) 2001,02,03 NEC Electronics Corporation
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* Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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*/
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#include <asm/v850e_utils.h>
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/* Calculate counter clock-divider and count values to attain the
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desired frequency RATE from the base frequency BASE_FREQ. The
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counter is expected to have a clock-divider, which can divide the
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system cpu clock by a power of two value from MIN_DIVLOG2 to
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MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter
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counts up and resets whenever it's equal to the compare register,
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generating an interrupt or whatever when it does so). The returned
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values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT
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-- the counter compare value to use. Returns true if it was possible
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to find a reasonable value, otherwise false (and the other return
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values will be set to be as good as possible). */
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int calc_counter_params (unsigned long base_freq,
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unsigned long rate,
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unsigned min_divlog2, unsigned max_divlog2,
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unsigned counter_size,
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unsigned *divlog2, unsigned *count)
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{
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unsigned _divlog2;
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int ok = 0;
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/* Find the lowest clock divider setting that can represent RATE. */
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for (_divlog2 = min_divlog2; _divlog2 <= max_divlog2; _divlog2++) {
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/* Minimum interrupt rate possible using this divider. */
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unsigned min_int_rate
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= (base_freq >> _divlog2) >> counter_size;
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if (min_int_rate <= rate) {
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/* This setting is the highest resolution
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setting that's slow enough enough to attain
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RATE interrupts per second, so use it. */
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ok = 1;
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break;
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}
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}
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if (_divlog2 > max_divlog2)
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/* Can't find correct setting. */
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_divlog2 = max_divlog2;
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if (divlog2)
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*divlog2 = _divlog2;
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if (count)
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*count = ((base_freq >> _divlog2) + rate/2) / rate;
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return ok;
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}
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