95 lines
1.7 KiB
ArmAsm
95 lines
1.7 KiB
ArmAsm
/* Check if CPU has some minimum CPUID bits
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This runs in 16bit mode so that the caller can still use the BIOS
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to output errors on the screen */
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#include <asm/cpufeature.h>
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#include <asm/msr.h>
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verify_cpu:
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pushfl # Save caller passed flags
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pushl $0 # Kill any dangerous flags
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popfl
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#if CONFIG_X86_MINIMUM_CPU_MODEL >= 4
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pushfl
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pop %eax
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orl $(1<<18),%eax # try setting AC
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push %eax
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popfl
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pushfl
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popl %eax
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testl $(1<<18),%eax
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jz bad
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#endif
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#if REQUIRED_MASK1 != 0
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pushfl # standard way to check for cpuid
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popl %eax
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movl %eax,%ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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cmpl %eax,%ebx
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pushfl # standard way to check for cpuid
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popl %eax
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movl %eax,%ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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cmpl %eax,%ebx
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jz bad # REQUIRED_MASK1 != 0 requires CPUID
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movl $0x0,%eax # See if cpuid 1 is implemented
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cpuid
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cmpl $0x1,%eax
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jb bad # no cpuid 1
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#if REQUIRED_MASK1 & NEED_CMPXCHG64
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/* Some VIA C3s need magic MSRs to enable CX64. Do this here */
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cmpl $0x746e6543,%ebx # Cent
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jne 1f
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cmpl $0x48727561,%edx # aurH
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jne 1f
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cmpl $0x736c7561,%ecx # auls
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jne 1f
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movl $1,%eax # check model
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cpuid
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movl %eax,%ebx
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shr $8,%ebx
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andl $0xf,%ebx
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cmp $6,%ebx # check family == 6
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jne 1f
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shr $4,%eax
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andl $0xf,%eax
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cmpl $6,%eax # check model >= 6
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jb 1f
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# assume models >= 6 all support this MSR
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movl $MSR_VIA_FCR,%ecx
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rdmsr
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orl $((1<<1)|(1<<7)),%eax # enable CMPXCHG64 and PGE
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wrmsr
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1:
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#endif
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movl $0x1,%eax # Does the cpu have what it takes
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cpuid
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#if CONFIG_X86_MINIMUM_CPU_MODEL > 4
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#error add proper model checking here
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#endif
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andl $REQUIRED_MASK1,%edx
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xorl $REQUIRED_MASK1,%edx
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jnz bad
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#endif /* REQUIRED_MASK1 */
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popfl
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xor %eax,%eax
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ret
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bad:
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popfl
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movl $1,%eax
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ret
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