e07af26266
- MM rework
+ Implementing up to 4 paging levels.
+ Enable STRICT_MM_TYPECHECK
+ switch pgtable_t back to struct page *
- Atomics rework / implementing relaxed accessors
- Retiring of legacy MMUv1,v2; ARC750 cores
- A few other build errors, typos
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Merge tag 'arc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC updates from Vineet Gupta:
"Finally a big pile of changes for ARC (atomics/mm). These are from our
internal arc64 tree, preparing mainline for eventual arc64 support.
I'm spreading them out to avoid tsunami of patches in one release.
- MM rework:
- Implement up to 4 paging levels
- Enable STRICT_MM_TYPECHECK
- switch pgtable_t back to 'struct page *'
- Atomics rework / implement relaxed accessors
- Retire legacy MMUv1,v2; ARC750 cores
- A few other build errors, typos"
* tag 'arc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (33 commits)
ARC: mm: vmalloc sync from kernel to user table to update PMD ...
ARC: mm: support 4 levels of page tables
ARC: mm: support 3 levels of page tables
ARC: mm: switch to asm-generic/pgalloc.h
ARC: mm: switch pgtable_t back to struct page *
ARC: mm: hack to allow 2 level build with 4 level code
ARC: mm: disintegrate pgtable.h into levels and flags
ARC: mm: disintegrate mmu.h (arcv2 bits out)
ARC: mm: move MMU specific bits out of entry code ...
ARC: mm: move MMU specific bits out of ASID allocator
ARC: mm: non-functional code movement/cleanup
ARC: mm: pmd_populate* to use the canonical set_pmd (and drop pmd_set)
ARC: ioremap: use more commonly used PAGE_KERNEL based uncached flag
ARC: mm: Enable STRICT_MM_TYPECHECKS
ARC: mm: Fixes to allow STRICT_MM_TYPECHECKS
ARC: mm: move mmu/cache externs out to setup.h
ARC: mm: remove tlb paranoid code
ARC: mm: use SCRATCH_DATA0 register for caching pgdir in ARCv2 only
ARC: retire MMUv1 and MMUv2 support
ARC: retire ARC750 support
...
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