350 lines
8.6 KiB
C
350 lines
8.6 KiB
C
/*
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* linux/arch/arm/mach-omap2/usb-tusb6010.c
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*
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* Copyright (C) 2006 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/usb/musb.h>
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#include <asm/arch/gpmc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mux.h>
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static u8 async_cs, sync_cs;
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static unsigned refclk_psec;
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/* t2_ps, when quantized to fclk units, must happen no earlier than
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* the clock after after t1_NS.
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*
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* Return a possibly updated value of t2_ps, converted to nsec.
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*/
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static unsigned
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next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)
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{
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unsigned t1_ps = t1_NS * 1000;
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unsigned t1_f, t2_f;
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if ((t1_ps + fclk_ps) < t2_ps)
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return t2_ps / 1000;
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t1_f = (t1_ps + fclk_ps - 1) / fclk_ps;
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t2_f = (t2_ps + fclk_ps - 1) / fclk_ps;
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if (t1_f >= t2_f)
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t2_f = t1_f + 1;
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return (t2_f * fclk_ps) / 1000;
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}
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/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
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static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
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{
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struct gpmc_timings t;
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unsigned t_acsnh_advnh = sysclk_ps + 3000;
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unsigned tmp;
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memset(&t, 0, sizeof(t));
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/* CS_ON = t_acsnh_acsnl */
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t.cs_on = 8;
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/* ADV_ON = t_acsnh_advnh - t_advn */
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t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps);
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/*
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* READ ... from omap2420 TRM fig 12-13
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*/
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/* ADV_RD_OFF = t_acsnh_advnh */
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t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps);
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/* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */
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t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps);
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/* ACCESS = counters continue only after nRDY */
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tmp = t.oe_on * 1000 + 300;
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t.access = next_clk(t.oe_on, tmp, fclk_ps);
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/* OE_OFF = after data gets sampled */
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tmp = t.access * 1000;
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t.oe_off = next_clk(t.access, tmp, fclk_ps);
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t.cs_rd_off = t.oe_off;
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tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */;
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t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
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/*
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* WRITE ... from omap2420 TRM fig 12-15
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*/
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/* ADV_WR_OFF = t_acsnh_advnh */
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t.adv_wr_off = t.adv_rd_off;
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/* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */
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t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps);
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/* WE_OFF = after data gets sampled */
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tmp = t.we_on * 1000 + 300;
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t.we_off = next_clk(t.we_on, tmp, fclk_ps);
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t.cs_wr_off = t.we_off;
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tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;
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t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
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return gpmc_cs_set_timings(async_cs, &t);
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}
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static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)
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{
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struct gpmc_timings t;
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unsigned t_scsnh_advnh = sysclk_ps + 3000;
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unsigned tmp;
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memset(&t, 0, sizeof(t));
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t.cs_on = 8;
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/* ADV_ON = t_acsnh_advnh - t_advn */
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t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps);
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/* GPMC_CLK rate = fclk rate / div */
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t.sync_clk = 12 /* 11.1 nsec */;
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tmp = (t.sync_clk * 1000 + fclk_ps - 1) / fclk_ps;
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if (tmp > 4)
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return -ERANGE;
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if (tmp <= 0)
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tmp = 1;
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t.page_burst_access = (fclk_ps * tmp) / 1000;
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/*
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* READ ... based on omap2420 TRM fig 12-19, 12-20
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*/
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/* ADV_RD_OFF = t_scsnh_advnh */
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t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps);
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/* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */
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tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps);
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t.oe_on = next_clk(t.adv_on, tmp, fclk_ps);
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/* ACCESS = number of clock cycles after t_adv_eon */
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tmp = (t.oe_on * 1000) + (5 * fclk_ps);
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t.access = next_clk(t.oe_on, tmp, fclk_ps);
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/* OE_OFF = after data gets sampled */
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tmp = (t.access * 1000) + (1 * fclk_ps);
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t.oe_off = next_clk(t.access, tmp, fclk_ps);
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t.cs_rd_off = t.oe_off;
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tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */;
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t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
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/*
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* WRITE ... based on omap2420 TRM fig 12-21
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*/
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/* ADV_WR_OFF = t_scsnh_advnh */
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t.adv_wr_off = t.adv_rd_off;
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/* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */
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tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps);
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t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps);
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/* WE_OFF = number of clock cycles after t_adv_wen */
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tmp = (t.we_on * 1000) + (6 * fclk_ps);
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t.we_off = next_clk(t.we_on, tmp, fclk_ps);
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t.cs_wr_off = t.we_off;
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tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;
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t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
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return gpmc_cs_set_timings(sync_cs, &t);
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}
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extern unsigned long gpmc_get_fclk_period(void);
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/* tusb driver calls this when it changes the chip's clocking */
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int tusb6010_platform_retime(unsigned is_refclk)
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{
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static const char error[] =
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KERN_ERR "tusb6010 %s retime error %d\n";
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unsigned fclk_ps = gpmc_get_fclk_period();
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unsigned sysclk_ps;
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int status;
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if (!refclk_psec)
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return -ENODEV;
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sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
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status = tusb_set_async_mode(sysclk_ps, fclk_ps);
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if (status < 0) {
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printk(error, "async", status);
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goto done;
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}
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status = tusb_set_sync_mode(sysclk_ps, fclk_ps);
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if (status < 0)
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printk(error, "sync", status);
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done:
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return status;
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}
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EXPORT_SYMBOL_GPL(tusb6010_platform_retime);
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static struct resource tusb_resources[] = {
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/* Order is significant! The start/end fields
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* are updated during setup..
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*/
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{ /* Asynchronous access */
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.flags = IORESOURCE_MEM,
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},
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{ /* Synchronous access */
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.flags = IORESOURCE_MEM,
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},
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{ /* IRQ */
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 tusb_dmamask = ~(u32)0;
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static struct platform_device tusb_device = {
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.name = "musb_hdrc",
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.id = -1,
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.dev = {
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.dma_mask = &tusb_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(tusb_resources),
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.resource = tusb_resources,
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};
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/* this may be called only from board-*.c setup code */
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int __init
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tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
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unsigned ps_refclk, unsigned waitpin,
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unsigned async, unsigned sync,
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unsigned irq, unsigned dmachan)
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{
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int status;
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static char error[] __initdata =
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KERN_ERR "tusb6010 init error %d, %d\n";
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/* ASYNC region, primarily for PIO */
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status = gpmc_cs_request(async, SZ_16M, (unsigned long *)
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&tusb_resources[0].start);
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if (status < 0) {
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printk(error, 1, status);
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return status;
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}
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tusb_resources[0].end = tusb_resources[0].start + 0x9ff;
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async_cs = async;
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gpmc_cs_write_reg(async, GPMC_CS_CONFIG1,
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GPMC_CONFIG1_PAGE_LEN(2)
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| GPMC_CONFIG1_WAIT_READ_MON
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| GPMC_CONFIG1_WAIT_WRITE_MON
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| GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
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| GPMC_CONFIG1_READTYPE_ASYNC
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| GPMC_CONFIG1_WRITETYPE_ASYNC
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| GPMC_CONFIG1_DEVICESIZE_16
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| GPMC_CONFIG1_DEVICETYPE_NOR
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| GPMC_CONFIG1_MUXADDDATA);
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/* SYNC region, primarily for DMA */
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status = gpmc_cs_request(sync, SZ_16M, (unsigned long *)
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&tusb_resources[1].start);
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if (status < 0) {
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printk(error, 2, status);
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return status;
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}
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tusb_resources[1].end = tusb_resources[1].start + 0x9ff;
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sync_cs = sync;
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gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1,
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GPMC_CONFIG1_READMULTIPLE_SUPP
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| GPMC_CONFIG1_READTYPE_SYNC
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| GPMC_CONFIG1_WRITEMULTIPLE_SUPP
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| GPMC_CONFIG1_WRITETYPE_SYNC
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| GPMC_CONFIG1_CLKACTIVATIONTIME(1)
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| GPMC_CONFIG1_PAGE_LEN(2)
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| GPMC_CONFIG1_WAIT_READ_MON
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| GPMC_CONFIG1_WAIT_WRITE_MON
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| GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
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| GPMC_CONFIG1_DEVICESIZE_16
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| GPMC_CONFIG1_DEVICETYPE_NOR
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| GPMC_CONFIG1_MUXADDDATA
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/* fclk divider gets set later */
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);
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/* IRQ */
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status = omap_request_gpio(irq);
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if (status < 0) {
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printk(error, 3, status);
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return status;
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}
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omap_set_gpio_direction(irq, 1);
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tusb_resources[2].start = irq + IH_GPIO_BASE;
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/* set up memory timings ... can speed them up later */
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if (!ps_refclk) {
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printk(error, 4, status);
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return -ENODEV;
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}
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refclk_psec = ps_refclk;
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status = tusb6010_platform_retime(1);
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if (status < 0) {
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printk(error, 5, status);
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return status;
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}
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/* finish device setup ... */
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if (!data) {
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printk(error, 6, status);
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return -ENODEV;
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}
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data->multipoint = 1;
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tusb_device.dev.platform_data = data;
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/* REVISIT let the driver know what DMA channels work */
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if (!dmachan)
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tusb_device.dev.dma_mask = NULL;
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else {
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/* assume OMAP 2420 ES2.0 and later */
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if (dmachan & (1 << 0))
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omap_cfg_reg(AA10_242X_DMAREQ0);
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if (dmachan & (1 << 1))
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omap_cfg_reg(AA6_242X_DMAREQ1);
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if (dmachan & (1 << 2))
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omap_cfg_reg(E4_242X_DMAREQ2);
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if (dmachan & (1 << 3))
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omap_cfg_reg(G4_242X_DMAREQ3);
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if (dmachan & (1 << 4))
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omap_cfg_reg(D3_242X_DMAREQ4);
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if (dmachan & (1 << 5))
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omap_cfg_reg(E3_242X_DMAREQ5);
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}
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/* so far so good ... register the device */
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status = platform_device_register(&tusb_device);
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if (status < 0) {
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printk(error, 7, status);
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return status;
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}
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return 0;
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}
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