158 lines
3.3 KiB
C
158 lines
3.3 KiB
C
/*
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* linux/arch/mips/dec/ioasic-irq.c
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*
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* DEC I/O ASIC interrupts.
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*
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* Copyright (c) 2002, 2003 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <asm/dec/ioasic.h>
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#include <asm/dec/ioasic_addrs.h>
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#include <asm/dec/ioasic_ints.h>
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static DEFINE_SPINLOCK(ioasic_lock);
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static int ioasic_irq_base;
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static inline void unmask_ioasic_irq(unsigned int irq)
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{
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u32 simr;
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simr = ioasic_read(IO_REG_SIMR);
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simr |= (1 << (irq - ioasic_irq_base));
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ioasic_write(IO_REG_SIMR, simr);
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}
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static inline void mask_ioasic_irq(unsigned int irq)
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{
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u32 simr;
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simr = ioasic_read(IO_REG_SIMR);
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simr &= ~(1 << (irq - ioasic_irq_base));
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ioasic_write(IO_REG_SIMR, simr);
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}
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static inline void clear_ioasic_irq(unsigned int irq)
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{
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u32 sir;
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sir = ~(1 << (irq - ioasic_irq_base));
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ioasic_write(IO_REG_SIR, sir);
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}
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static inline void enable_ioasic_irq(unsigned int irq)
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{
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unsigned long flags;
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spin_lock_irqsave(&ioasic_lock, flags);
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unmask_ioasic_irq(irq);
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spin_unlock_irqrestore(&ioasic_lock, flags);
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}
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static inline void disable_ioasic_irq(unsigned int irq)
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{
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unsigned long flags;
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spin_lock_irqsave(&ioasic_lock, flags);
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mask_ioasic_irq(irq);
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spin_unlock_irqrestore(&ioasic_lock, flags);
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}
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static inline unsigned int startup_ioasic_irq(unsigned int irq)
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{
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enable_ioasic_irq(irq);
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return 0;
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}
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#define shutdown_ioasic_irq disable_ioasic_irq
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static inline void ack_ioasic_irq(unsigned int irq)
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{
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spin_lock(&ioasic_lock);
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mask_ioasic_irq(irq);
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spin_unlock(&ioasic_lock);
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fast_iob();
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}
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static inline void end_ioasic_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
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enable_ioasic_irq(irq);
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}
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static struct hw_interrupt_type ioasic_irq_type = {
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.typename = "IO-ASIC",
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.startup = startup_ioasic_irq,
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.shutdown = shutdown_ioasic_irq,
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.enable = enable_ioasic_irq,
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.disable = disable_ioasic_irq,
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.ack = ack_ioasic_irq,
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.end = end_ioasic_irq,
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};
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#define startup_ioasic_dma_irq startup_ioasic_irq
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#define shutdown_ioasic_dma_irq shutdown_ioasic_irq
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#define enable_ioasic_dma_irq enable_ioasic_irq
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#define disable_ioasic_dma_irq disable_ioasic_irq
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#define ack_ioasic_dma_irq ack_ioasic_irq
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static inline void end_ioasic_dma_irq(unsigned int irq)
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{
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clear_ioasic_irq(irq);
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fast_iob();
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end_ioasic_irq(irq);
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}
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static struct hw_interrupt_type ioasic_dma_irq_type = {
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.typename = "IO-ASIC-DMA",
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.startup = startup_ioasic_dma_irq,
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.shutdown = shutdown_ioasic_dma_irq,
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.enable = enable_ioasic_dma_irq,
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.disable = disable_ioasic_dma_irq,
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.ack = ack_ioasic_dma_irq,
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.end = end_ioasic_dma_irq,
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};
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void __init init_ioasic_irqs(int base)
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{
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int i;
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/* Mask interrupts. */
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ioasic_write(IO_REG_SIMR, 0);
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fast_iob();
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for (i = base; i < base + IO_INR_DMA; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].handler = &ioasic_irq_type;
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}
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for (; i < base + IO_IRQ_LINES; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].handler = &ioasic_dma_irq_type;
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}
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ioasic_irq_base = base;
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}
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