acrn-kernel/drivers/mmc
Philipp Zabel 97f8571e66 pxamci: fix byte aligned DMA transfers
The pxa27x DMA controller defaults to 64-bit alignment. This caused
the SCR reads to fail (and, depending on card type, error out) when
card->raw_scr was not aligned on a 8-byte boundary.

For performance reasons all scatter-gather addresses passed to
pxamci_request should be aligned on 8-byte boundaries, but if
this can't be guaranteed, byte aligned DMA transfers in the
have to be enabled in the controller to get correct behaviour.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-06 10:37:40 -07:00
..
card mmc: Fix crash in mmc_block on 64-bit 2008-06-05 16:14:17 -07:00
core mmc: sdio_ops.c should #include "sdio_ops.h" 2008-04-18 20:05:33 +02:00
host pxamci: fix byte aligned DMA transfers 2008-07-06 10:37:40 -07:00
Kconfig
Makefile