936 lines
27 KiB
C
936 lines
27 KiB
C
/*
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* IBM eServer eHCA Infiniband device driver for Linux on POWER
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*
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* Firmware Infiniband Interface code for POWER
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*
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* Authors: Christoph Raisch <raisch@de.ibm.com>
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* Hoang-Nam Nguyen <hnguyen@de.ibm.com>
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* Joachim Fenkes <fenkes@de.ibm.com>
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* Gerd Bayer <gerd.bayer@de.ibm.com>
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* Waleri Fomin <fomin@de.ibm.com>
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*
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* Copyright (c) 2005 IBM Corporation
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*
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* All rights reserved.
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*
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* This source code is distributed under a dual license of GPL v2.0 and OpenIB
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* BSD.
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*
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* OpenIB BSD License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <asm/hvcall.h>
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#include "ehca_tools.h"
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#include "hcp_if.h"
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#include "hcp_phyp.h"
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#include "hipz_fns.h"
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#include "ipz_pt_fn.h"
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#define H_ALL_RES_QP_ENHANCED_OPS EHCA_BMASK_IBM(9, 11)
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#define H_ALL_RES_QP_PTE_PIN EHCA_BMASK_IBM(12, 12)
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#define H_ALL_RES_QP_SERVICE_TYPE EHCA_BMASK_IBM(13, 15)
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#define H_ALL_RES_QP_STORAGE EHCA_BMASK_IBM(16, 17)
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#define H_ALL_RES_QP_LL_RQ_CQE_POSTING EHCA_BMASK_IBM(18, 18)
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#define H_ALL_RES_QP_LL_SQ_CQE_POSTING EHCA_BMASK_IBM(19, 21)
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#define H_ALL_RES_QP_SIGNALING_TYPE EHCA_BMASK_IBM(22, 23)
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#define H_ALL_RES_QP_UD_AV_LKEY_CTRL EHCA_BMASK_IBM(31, 31)
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#define H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE EHCA_BMASK_IBM(32, 35)
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#define H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE EHCA_BMASK_IBM(36, 39)
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#define H_ALL_RES_QP_RESOURCE_TYPE EHCA_BMASK_IBM(56, 63)
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#define H_ALL_RES_QP_MAX_OUTST_SEND_WR EHCA_BMASK_IBM(0, 15)
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#define H_ALL_RES_QP_MAX_OUTST_RECV_WR EHCA_BMASK_IBM(16, 31)
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#define H_ALL_RES_QP_MAX_SEND_SGE EHCA_BMASK_IBM(32, 39)
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#define H_ALL_RES_QP_MAX_RECV_SGE EHCA_BMASK_IBM(40, 47)
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#define H_ALL_RES_QP_UD_AV_LKEY EHCA_BMASK_IBM(32, 63)
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#define H_ALL_RES_QP_SRQ_QP_TOKEN EHCA_BMASK_IBM(0, 31)
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#define H_ALL_RES_QP_SRQ_QP_HANDLE EHCA_BMASK_IBM(0, 64)
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#define H_ALL_RES_QP_SRQ_LIMIT EHCA_BMASK_IBM(48, 63)
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#define H_ALL_RES_QP_SRQ_QPN EHCA_BMASK_IBM(40, 63)
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#define H_ALL_RES_QP_ACT_OUTST_SEND_WR EHCA_BMASK_IBM(16, 31)
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#define H_ALL_RES_QP_ACT_OUTST_RECV_WR EHCA_BMASK_IBM(48, 63)
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#define H_ALL_RES_QP_ACT_SEND_SGE EHCA_BMASK_IBM(8, 15)
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#define H_ALL_RES_QP_ACT_RECV_SGE EHCA_BMASK_IBM(24, 31)
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#define H_ALL_RES_QP_SQUEUE_SIZE_PAGES EHCA_BMASK_IBM(0, 31)
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#define H_ALL_RES_QP_RQUEUE_SIZE_PAGES EHCA_BMASK_IBM(32, 63)
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#define H_MP_INIT_TYPE EHCA_BMASK_IBM(44, 47)
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#define H_MP_SHUTDOWN EHCA_BMASK_IBM(48, 48)
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#define H_MP_RESET_QKEY_CTR EHCA_BMASK_IBM(49, 49)
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#define HCALL4_REGS_FORMAT "r4=%lx r5=%lx r6=%lx r7=%lx"
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#define HCALL7_REGS_FORMAT HCALL4_REGS_FORMAT " r8=%lx r9=%lx r10=%lx"
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#define HCALL9_REGS_FORMAT HCALL7_REGS_FORMAT " r11=%lx r12=%lx"
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static DEFINE_SPINLOCK(hcall_lock);
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static u32 get_longbusy_msecs(int longbusy_rc)
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{
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switch (longbusy_rc) {
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case H_LONG_BUSY_ORDER_1_MSEC:
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return 1;
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case H_LONG_BUSY_ORDER_10_MSEC:
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return 10;
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case H_LONG_BUSY_ORDER_100_MSEC:
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return 100;
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case H_LONG_BUSY_ORDER_1_SEC:
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return 1000;
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case H_LONG_BUSY_ORDER_10_SEC:
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return 10000;
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case H_LONG_BUSY_ORDER_100_SEC:
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return 100000;
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default:
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return 1;
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}
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}
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static long ehca_plpar_hcall_norets(unsigned long opcode,
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unsigned long arg1,
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unsigned long arg2,
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unsigned long arg3,
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unsigned long arg4,
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unsigned long arg5,
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unsigned long arg6,
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unsigned long arg7)
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{
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long ret;
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int i, sleep_msecs;
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unsigned long flags = 0;
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if (unlikely(ehca_debug_level >= 2))
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ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT,
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opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
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for (i = 0; i < 5; i++) {
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/* serialize hCalls to work around firmware issue */
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if (ehca_lock_hcalls)
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spin_lock_irqsave(&hcall_lock, flags);
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ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4,
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arg5, arg6, arg7);
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if (ehca_lock_hcalls)
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spin_unlock_irqrestore(&hcall_lock, flags);
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if (H_IS_LONG_BUSY(ret)) {
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sleep_msecs = get_longbusy_msecs(ret);
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msleep_interruptible(sleep_msecs);
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continue;
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}
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if (ret < H_SUCCESS)
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ehca_gen_err("opcode=%lx ret=%li " HCALL7_REGS_FORMAT,
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opcode, ret, arg1, arg2, arg3,
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arg4, arg5, arg6, arg7);
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else
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if (unlikely(ehca_debug_level >= 2))
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ehca_gen_dbg("opcode=%lx ret=%li", opcode, ret);
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return ret;
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}
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return H_BUSY;
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}
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static long ehca_plpar_hcall9(unsigned long opcode,
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unsigned long *outs, /* array of 9 outputs */
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unsigned long arg1,
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unsigned long arg2,
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unsigned long arg3,
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unsigned long arg4,
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unsigned long arg5,
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unsigned long arg6,
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unsigned long arg7,
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unsigned long arg8,
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unsigned long arg9)
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{
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long ret;
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int i, sleep_msecs;
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unsigned long flags = 0;
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if (unlikely(ehca_debug_level >= 2))
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ehca_gen_dbg("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, opcode,
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arg1, arg2, arg3, arg4, arg5,
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arg6, arg7, arg8, arg9);
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for (i = 0; i < 5; i++) {
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/* serialize hCalls to work around firmware issue */
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if (ehca_lock_hcalls)
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spin_lock_irqsave(&hcall_lock, flags);
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ret = plpar_hcall9(opcode, outs,
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arg1, arg2, arg3, arg4, arg5,
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arg6, arg7, arg8, arg9);
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if (ehca_lock_hcalls)
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spin_unlock_irqrestore(&hcall_lock, flags);
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if (H_IS_LONG_BUSY(ret)) {
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sleep_msecs = get_longbusy_msecs(ret);
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msleep_interruptible(sleep_msecs);
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continue;
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}
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if (ret < H_SUCCESS) {
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ehca_gen_err("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT,
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opcode, arg1, arg2, arg3, arg4, arg5,
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arg6, arg7, arg8, arg9);
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ehca_gen_err("OUTPUT -- ret=%li " HCALL9_REGS_FORMAT,
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ret, outs[0], outs[1], outs[2], outs[3],
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outs[4], outs[5], outs[6], outs[7],
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outs[8]);
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} else if (unlikely(ehca_debug_level >= 2))
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ehca_gen_dbg("OUTPUT -- ret=%li " HCALL9_REGS_FORMAT,
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ret, outs[0], outs[1], outs[2], outs[3],
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outs[4], outs[5], outs[6], outs[7],
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outs[8]);
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return ret;
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}
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return H_BUSY;
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}
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u64 hipz_h_alloc_resource_eq(const struct ipz_adapter_handle adapter_handle,
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struct ehca_pfeq *pfeq,
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const u32 neq_control,
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const u32 number_of_entries,
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struct ipz_eq_handle *eq_handle,
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u32 *act_nr_of_entries,
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u32 *act_pages,
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u32 *eq_ist)
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{
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u64 ret;
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u64 outs[PLPAR_HCALL9_BUFSIZE];
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u64 allocate_controls;
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/* resource type */
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allocate_controls = 3ULL;
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/* ISN is associated */
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if (neq_control != 1)
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allocate_controls = (1ULL << (63 - 7)) | allocate_controls;
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else /* notification event queue */
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allocate_controls = (1ULL << 63) | allocate_controls;
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ret = ehca_plpar_hcall9(H_ALLOC_RESOURCE, outs,
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adapter_handle.handle, /* r4 */
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allocate_controls, /* r5 */
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number_of_entries, /* r6 */
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0, 0, 0, 0, 0, 0);
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eq_handle->handle = outs[0];
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*act_nr_of_entries = (u32)outs[3];
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*act_pages = (u32)outs[4];
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*eq_ist = (u32)outs[5];
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if (ret == H_NOT_ENOUGH_RESOURCES)
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ehca_gen_err("Not enough resource - ret=%li ", ret);
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return ret;
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}
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u64 hipz_h_reset_event(const struct ipz_adapter_handle adapter_handle,
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struct ipz_eq_handle eq_handle,
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const u64 event_mask)
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{
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return ehca_plpar_hcall_norets(H_RESET_EVENTS,
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adapter_handle.handle, /* r4 */
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eq_handle.handle, /* r5 */
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event_mask, /* r6 */
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0, 0, 0, 0);
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}
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u64 hipz_h_alloc_resource_cq(const struct ipz_adapter_handle adapter_handle,
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struct ehca_cq *cq,
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struct ehca_alloc_cq_parms *param)
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{
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u64 ret;
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u64 outs[PLPAR_HCALL9_BUFSIZE];
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ret = ehca_plpar_hcall9(H_ALLOC_RESOURCE, outs,
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adapter_handle.handle, /* r4 */
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2, /* r5 */
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param->eq_handle.handle, /* r6 */
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cq->token, /* r7 */
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param->nr_cqe, /* r8 */
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0, 0, 0, 0);
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cq->ipz_cq_handle.handle = outs[0];
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param->act_nr_of_entries = (u32)outs[3];
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param->act_pages = (u32)outs[4];
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if (ret == H_SUCCESS)
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hcp_galpas_ctor(&cq->galpas, outs[5], outs[6]);
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if (ret == H_NOT_ENOUGH_RESOURCES)
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ehca_gen_err("Not enough resources. ret=%li", ret);
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return ret;
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}
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u64 hipz_h_alloc_resource_qp(const struct ipz_adapter_handle adapter_handle,
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struct ehca_alloc_qp_parms *parms)
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{
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u64 ret;
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u64 allocate_controls, max_r10_reg, r11, r12;
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u64 outs[PLPAR_HCALL9_BUFSIZE];
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allocate_controls =
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EHCA_BMASK_SET(H_ALL_RES_QP_ENHANCED_OPS, parms->ext_type)
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| EHCA_BMASK_SET(H_ALL_RES_QP_PTE_PIN, 0)
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| EHCA_BMASK_SET(H_ALL_RES_QP_SERVICE_TYPE, parms->servicetype)
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| EHCA_BMASK_SET(H_ALL_RES_QP_SIGNALING_TYPE, parms->sigtype)
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| EHCA_BMASK_SET(H_ALL_RES_QP_STORAGE, parms->qp_storage)
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| EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE,
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parms->squeue.page_size)
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| EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE,
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parms->rqueue.page_size)
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| EHCA_BMASK_SET(H_ALL_RES_QP_LL_RQ_CQE_POSTING,
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!!(parms->ll_comp_flags & LLQP_RECV_COMP))
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| EHCA_BMASK_SET(H_ALL_RES_QP_LL_SQ_CQE_POSTING,
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!!(parms->ll_comp_flags & LLQP_SEND_COMP))
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| EHCA_BMASK_SET(H_ALL_RES_QP_UD_AV_LKEY_CTRL,
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parms->ud_av_l_key_ctl)
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| EHCA_BMASK_SET(H_ALL_RES_QP_RESOURCE_TYPE, 1);
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max_r10_reg =
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EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_SEND_WR,
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parms->squeue.max_wr + 1)
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| EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_RECV_WR,
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parms->rqueue.max_wr + 1)
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| EHCA_BMASK_SET(H_ALL_RES_QP_MAX_SEND_SGE,
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parms->squeue.max_sge)
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| EHCA_BMASK_SET(H_ALL_RES_QP_MAX_RECV_SGE,
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parms->rqueue.max_sge);
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r11 = EHCA_BMASK_SET(H_ALL_RES_QP_SRQ_QP_TOKEN, parms->srq_token);
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if (parms->ext_type == EQPT_SRQ)
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r12 = EHCA_BMASK_SET(H_ALL_RES_QP_SRQ_LIMIT, parms->srq_limit);
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else
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r12 = EHCA_BMASK_SET(H_ALL_RES_QP_SRQ_QPN, parms->srq_qpn);
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ret = ehca_plpar_hcall9(H_ALLOC_RESOURCE, outs,
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adapter_handle.handle, /* r4 */
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allocate_controls, /* r5 */
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parms->send_cq_handle.handle,
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parms->recv_cq_handle.handle,
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parms->eq_handle.handle,
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((u64)parms->token << 32) | parms->pd.value,
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max_r10_reg, r11, r12);
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parms->qp_handle.handle = outs[0];
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parms->real_qp_num = (u32)outs[1];
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parms->squeue.act_nr_wqes =
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(u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_SEND_WR, outs[2]);
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parms->rqueue.act_nr_wqes =
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(u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_RECV_WR, outs[2]);
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parms->squeue.act_nr_sges =
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(u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_SEND_SGE, outs[3]);
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parms->rqueue.act_nr_sges =
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(u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_RECV_SGE, outs[3]);
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parms->squeue.queue_size =
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(u32)EHCA_BMASK_GET(H_ALL_RES_QP_SQUEUE_SIZE_PAGES, outs[4]);
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parms->rqueue.queue_size =
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(u32)EHCA_BMASK_GET(H_ALL_RES_QP_RQUEUE_SIZE_PAGES, outs[4]);
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if (ret == H_SUCCESS)
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hcp_galpas_ctor(&parms->galpas, outs[6], outs[6]);
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if (ret == H_NOT_ENOUGH_RESOURCES)
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ehca_gen_err("Not enough resources. ret=%li", ret);
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return ret;
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}
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u64 hipz_h_query_port(const struct ipz_adapter_handle adapter_handle,
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const u8 port_id,
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struct hipz_query_port *query_port_response_block)
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{
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u64 ret;
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u64 r_cb = virt_to_abs(query_port_response_block);
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if (r_cb & (EHCA_PAGESIZE-1)) {
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ehca_gen_err("response block not page aligned");
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return H_PARAMETER;
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}
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ret = ehca_plpar_hcall_norets(H_QUERY_PORT,
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adapter_handle.handle, /* r4 */
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port_id, /* r5 */
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r_cb, /* r6 */
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0, 0, 0, 0);
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if (ehca_debug_level >= 2)
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ehca_dmp(query_port_response_block, 64, "response_block");
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return ret;
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}
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u64 hipz_h_modify_port(const struct ipz_adapter_handle adapter_handle,
|
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const u8 port_id, const u32 port_cap,
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const u8 init_type, const int modify_mask)
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{
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u64 port_attributes = port_cap;
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if (modify_mask & IB_PORT_SHUTDOWN)
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port_attributes |= EHCA_BMASK_SET(H_MP_SHUTDOWN, 1);
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if (modify_mask & IB_PORT_INIT_TYPE)
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port_attributes |= EHCA_BMASK_SET(H_MP_INIT_TYPE, init_type);
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if (modify_mask & IB_PORT_RESET_QKEY_CNTR)
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port_attributes |= EHCA_BMASK_SET(H_MP_RESET_QKEY_CTR, 1);
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return ehca_plpar_hcall_norets(H_MODIFY_PORT,
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adapter_handle.handle, /* r4 */
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port_id, /* r5 */
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port_attributes, /* r6 */
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0, 0, 0, 0);
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}
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|
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u64 hipz_h_query_hca(const struct ipz_adapter_handle adapter_handle,
|
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struct hipz_query_hca *query_hca_rblock)
|
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{
|
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u64 r_cb = virt_to_abs(query_hca_rblock);
|
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|
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if (r_cb & (EHCA_PAGESIZE-1)) {
|
|
ehca_gen_err("response_block=%p not page aligned",
|
|
query_hca_rblock);
|
|
return H_PARAMETER;
|
|
}
|
|
|
|
return ehca_plpar_hcall_norets(H_QUERY_HCA,
|
|
adapter_handle.handle, /* r4 */
|
|
r_cb, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
}
|
|
|
|
u64 hipz_h_register_rpage(const struct ipz_adapter_handle adapter_handle,
|
|
const u8 pagesize,
|
|
const u8 queue_type,
|
|
const u64 resource_handle,
|
|
const u64 logical_address_of_page,
|
|
u64 count)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_REGISTER_RPAGES,
|
|
adapter_handle.handle, /* r4 */
|
|
(u64)queue_type | ((u64)pagesize) << 8,
|
|
/* r5 */
|
|
resource_handle, /* r6 */
|
|
logical_address_of_page, /* r7 */
|
|
count, /* r8 */
|
|
0, 0);
|
|
}
|
|
|
|
u64 hipz_h_register_rpage_eq(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_eq_handle eq_handle,
|
|
struct ehca_pfeq *pfeq,
|
|
const u8 pagesize,
|
|
const u8 queue_type,
|
|
const u64 logical_address_of_page,
|
|
const u64 count)
|
|
{
|
|
if (count != 1) {
|
|
ehca_gen_err("Ppage counter=%lx", count);
|
|
return H_PARAMETER;
|
|
}
|
|
return hipz_h_register_rpage(adapter_handle,
|
|
pagesize,
|
|
queue_type,
|
|
eq_handle.handle,
|
|
logical_address_of_page, count);
|
|
}
|
|
|
|
u64 hipz_h_query_int_state(const struct ipz_adapter_handle adapter_handle,
|
|
u32 ist)
|
|
{
|
|
u64 ret;
|
|
ret = ehca_plpar_hcall_norets(H_QUERY_INT_STATE,
|
|
adapter_handle.handle, /* r4 */
|
|
ist, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
|
|
if (ret != H_SUCCESS && ret != H_BUSY)
|
|
ehca_gen_err("Could not query interrupt state.");
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_register_rpage_cq(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_cq_handle cq_handle,
|
|
struct ehca_pfcq *pfcq,
|
|
const u8 pagesize,
|
|
const u8 queue_type,
|
|
const u64 logical_address_of_page,
|
|
const u64 count,
|
|
const struct h_galpa gal)
|
|
{
|
|
if (count != 1) {
|
|
ehca_gen_err("Page counter=%lx", count);
|
|
return H_PARAMETER;
|
|
}
|
|
|
|
return hipz_h_register_rpage(adapter_handle, pagesize, queue_type,
|
|
cq_handle.handle, logical_address_of_page,
|
|
count);
|
|
}
|
|
|
|
u64 hipz_h_register_rpage_qp(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct ehca_pfqp *pfqp,
|
|
const u8 pagesize,
|
|
const u8 queue_type,
|
|
const u64 logical_address_of_page,
|
|
const u64 count,
|
|
const struct h_galpa galpa)
|
|
{
|
|
if (count > 1) {
|
|
ehca_gen_err("Page counter=%lx", count);
|
|
return H_PARAMETER;
|
|
}
|
|
|
|
return hipz_h_register_rpage(adapter_handle, pagesize, queue_type,
|
|
qp_handle.handle, logical_address_of_page,
|
|
count);
|
|
}
|
|
|
|
u64 hipz_h_disable_and_get_wqe(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct ehca_pfqp *pfqp,
|
|
void **log_addr_next_sq_wqe2processed,
|
|
void **log_addr_next_rq_wqe2processed,
|
|
int dis_and_get_function_code)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_DISABLE_AND_GETC, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
dis_and_get_function_code, /* r5 */
|
|
qp_handle.handle, /* r6 */
|
|
0, 0, 0, 0, 0, 0);
|
|
if (log_addr_next_sq_wqe2processed)
|
|
*log_addr_next_sq_wqe2processed = (void *)outs[0];
|
|
if (log_addr_next_rq_wqe2processed)
|
|
*log_addr_next_rq_wqe2processed = (void *)outs[1];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_modify_qp(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct ehca_pfqp *pfqp,
|
|
const u64 update_mask,
|
|
struct hcp_modify_qp_control_block *mqpcb,
|
|
struct h_galpa gal)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
ret = ehca_plpar_hcall9(H_MODIFY_QP, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
update_mask, /* r6 */
|
|
virt_to_abs(mqpcb), /* r7 */
|
|
0, 0, 0, 0, 0);
|
|
|
|
if (ret == H_NOT_ENOUGH_RESOURCES)
|
|
ehca_gen_err("Insufficient resources ret=%li", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_query_qp(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct ehca_pfqp *pfqp,
|
|
struct hcp_modify_qp_control_block *qqpcb,
|
|
struct h_galpa gal)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_QUERY_QP,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
virt_to_abs(qqpcb), /* r6 */
|
|
0, 0, 0, 0);
|
|
}
|
|
|
|
u64 hipz_h_destroy_qp(const struct ipz_adapter_handle adapter_handle,
|
|
struct ehca_qp *qp)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = hcp_galpas_dtor(&qp->galpas);
|
|
if (ret) {
|
|
ehca_gen_err("Could not destruct qp->galpas");
|
|
return H_RESOURCE;
|
|
}
|
|
ret = ehca_plpar_hcall9(H_DISABLE_AND_GETC, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
/* function code */
|
|
1, /* r5 */
|
|
qp->ipz_qp_handle.handle, /* r6 */
|
|
0, 0, 0, 0, 0, 0);
|
|
if (ret == H_HARDWARE)
|
|
ehca_gen_err("HCA not operational. ret=%li", ret);
|
|
|
|
ret = ehca_plpar_hcall_norets(H_FREE_RESOURCE,
|
|
adapter_handle.handle, /* r4 */
|
|
qp->ipz_qp_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
|
|
if (ret == H_RESOURCE)
|
|
ehca_gen_err("Resource still in use. ret=%li", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_define_aqp0(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct h_galpa gal,
|
|
u32 port)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_DEFINE_AQP0,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
port, /* r6 */
|
|
0, 0, 0, 0);
|
|
}
|
|
|
|
u64 hipz_h_define_aqp1(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct h_galpa gal,
|
|
u32 port, u32 * pma_qp_nr,
|
|
u32 * bma_qp_nr)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_DEFINE_AQP1, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
port, /* r6 */
|
|
0, 0, 0, 0, 0, 0);
|
|
*pma_qp_nr = (u32)outs[0];
|
|
*bma_qp_nr = (u32)outs[1];
|
|
|
|
if (ret == H_ALIAS_EXIST)
|
|
ehca_gen_err("AQP1 already exists. ret=%li", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_attach_mcqp(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct h_galpa gal,
|
|
u16 mcg_dlid,
|
|
u64 subnet_prefix, u64 interface_id)
|
|
{
|
|
u64 ret;
|
|
|
|
ret = ehca_plpar_hcall_norets(H_ATTACH_MCQP,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
mcg_dlid, /* r6 */
|
|
interface_id, /* r7 */
|
|
subnet_prefix, /* r8 */
|
|
0, 0);
|
|
|
|
if (ret == H_NOT_ENOUGH_RESOURCES)
|
|
ehca_gen_err("Not enough resources. ret=%li", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_detach_mcqp(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ipz_qp_handle qp_handle,
|
|
struct h_galpa gal,
|
|
u16 mcg_dlid,
|
|
u64 subnet_prefix, u64 interface_id)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_DETACH_MCQP,
|
|
adapter_handle.handle, /* r4 */
|
|
qp_handle.handle, /* r5 */
|
|
mcg_dlid, /* r6 */
|
|
interface_id, /* r7 */
|
|
subnet_prefix, /* r8 */
|
|
0, 0);
|
|
}
|
|
|
|
u64 hipz_h_destroy_cq(const struct ipz_adapter_handle adapter_handle,
|
|
struct ehca_cq *cq,
|
|
u8 force_flag)
|
|
{
|
|
u64 ret;
|
|
|
|
ret = hcp_galpas_dtor(&cq->galpas);
|
|
if (ret) {
|
|
ehca_gen_err("Could not destruct cp->galpas");
|
|
return H_RESOURCE;
|
|
}
|
|
|
|
ret = ehca_plpar_hcall_norets(H_FREE_RESOURCE,
|
|
adapter_handle.handle, /* r4 */
|
|
cq->ipz_cq_handle.handle, /* r5 */
|
|
force_flag != 0 ? 1L : 0L, /* r6 */
|
|
0, 0, 0, 0);
|
|
|
|
if (ret == H_RESOURCE)
|
|
ehca_gen_err("H_FREE_RESOURCE failed ret=%li ", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_destroy_eq(const struct ipz_adapter_handle adapter_handle,
|
|
struct ehca_eq *eq)
|
|
{
|
|
u64 ret;
|
|
|
|
ret = hcp_galpas_dtor(&eq->galpas);
|
|
if (ret) {
|
|
ehca_gen_err("Could not destruct eq->galpas");
|
|
return H_RESOURCE;
|
|
}
|
|
|
|
ret = ehca_plpar_hcall_norets(H_FREE_RESOURCE,
|
|
adapter_handle.handle, /* r4 */
|
|
eq->ipz_eq_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
|
|
if (ret == H_RESOURCE)
|
|
ehca_gen_err("Resource in use. ret=%li ", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_alloc_resource_mr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr,
|
|
const u64 vaddr,
|
|
const u64 length,
|
|
const u32 access_ctrl,
|
|
const struct ipz_pd pd,
|
|
struct ehca_mr_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_ALLOC_RESOURCE, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
5, /* r5 */
|
|
vaddr, /* r6 */
|
|
length, /* r7 */
|
|
(((u64)access_ctrl) << 32ULL), /* r8 */
|
|
pd.value, /* r9 */
|
|
0, 0, 0);
|
|
outparms->handle.handle = outs[0];
|
|
outparms->lkey = (u32)outs[2];
|
|
outparms->rkey = (u32)outs[3];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_register_rpage_mr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr,
|
|
const u8 pagesize,
|
|
const u8 queue_type,
|
|
const u64 logical_address_of_page,
|
|
const u64 count)
|
|
{
|
|
u64 ret;
|
|
|
|
if (unlikely(ehca_debug_level >= 3)) {
|
|
if (count > 1) {
|
|
u64 *kpage;
|
|
int i;
|
|
kpage = (u64 *)abs_to_virt(logical_address_of_page);
|
|
for (i = 0; i < count; i++)
|
|
ehca_gen_dbg("kpage[%d]=%p",
|
|
i, (void *)kpage[i]);
|
|
} else
|
|
ehca_gen_dbg("kpage=%p",
|
|
(void *)logical_address_of_page);
|
|
}
|
|
|
|
if ((count > 1) && (logical_address_of_page & (EHCA_PAGESIZE-1))) {
|
|
ehca_gen_err("logical_address_of_page not on a 4k boundary "
|
|
"adapter_handle=%lx mr=%p mr_handle=%lx "
|
|
"pagesize=%x queue_type=%x "
|
|
"logical_address_of_page=%lx count=%lx",
|
|
adapter_handle.handle, mr,
|
|
mr->ipz_mr_handle.handle, pagesize, queue_type,
|
|
logical_address_of_page, count);
|
|
ret = H_PARAMETER;
|
|
} else
|
|
ret = hipz_h_register_rpage(adapter_handle, pagesize,
|
|
queue_type,
|
|
mr->ipz_mr_handle.handle,
|
|
logical_address_of_page, count);
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_query_mr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr,
|
|
struct ehca_mr_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_QUERY_MR, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
mr->ipz_mr_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0, 0, 0);
|
|
outparms->len = outs[0];
|
|
outparms->vaddr = outs[1];
|
|
outparms->acl = outs[4] >> 32;
|
|
outparms->lkey = (u32)(outs[5] >> 32);
|
|
outparms->rkey = (u32)(outs[5] & (0xffffffff));
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_free_resource_mr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_FREE_RESOURCE,
|
|
adapter_handle.handle, /* r4 */
|
|
mr->ipz_mr_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
}
|
|
|
|
u64 hipz_h_reregister_pmr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr,
|
|
const u64 vaddr_in,
|
|
const u64 length,
|
|
const u32 access_ctrl,
|
|
const struct ipz_pd pd,
|
|
const u64 mr_addr_cb,
|
|
struct ehca_mr_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_REREGISTER_PMR, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
mr->ipz_mr_handle.handle, /* r5 */
|
|
vaddr_in, /* r6 */
|
|
length, /* r7 */
|
|
/* r8 */
|
|
((((u64)access_ctrl) << 32ULL) | pd.value),
|
|
mr_addr_cb, /* r9 */
|
|
0, 0, 0);
|
|
outparms->vaddr = outs[1];
|
|
outparms->lkey = (u32)outs[2];
|
|
outparms->rkey = (u32)outs[3];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_register_smr(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mr *mr,
|
|
const struct ehca_mr *orig_mr,
|
|
const u64 vaddr_in,
|
|
const u32 access_ctrl,
|
|
const struct ipz_pd pd,
|
|
struct ehca_mr_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_REGISTER_SMR, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
orig_mr->ipz_mr_handle.handle, /* r5 */
|
|
vaddr_in, /* r6 */
|
|
(((u64)access_ctrl) << 32ULL), /* r7 */
|
|
pd.value, /* r8 */
|
|
0, 0, 0, 0);
|
|
outparms->handle.handle = outs[0];
|
|
outparms->lkey = (u32)outs[2];
|
|
outparms->rkey = (u32)outs[3];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_alloc_resource_mw(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mw *mw,
|
|
const struct ipz_pd pd,
|
|
struct ehca_mw_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_ALLOC_RESOURCE, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
6, /* r5 */
|
|
pd.value, /* r6 */
|
|
0, 0, 0, 0, 0, 0);
|
|
outparms->handle.handle = outs[0];
|
|
outparms->rkey = (u32)outs[3];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_query_mw(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mw *mw,
|
|
struct ehca_mw_hipzout_parms *outparms)
|
|
{
|
|
u64 ret;
|
|
u64 outs[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
ret = ehca_plpar_hcall9(H_QUERY_MW, outs,
|
|
adapter_handle.handle, /* r4 */
|
|
mw->ipz_mw_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0, 0, 0);
|
|
outparms->rkey = (u32)outs[3];
|
|
|
|
return ret;
|
|
}
|
|
|
|
u64 hipz_h_free_resource_mw(const struct ipz_adapter_handle adapter_handle,
|
|
const struct ehca_mw *mw)
|
|
{
|
|
return ehca_plpar_hcall_norets(H_FREE_RESOURCE,
|
|
adapter_handle.handle, /* r4 */
|
|
mw->ipz_mw_handle.handle, /* r5 */
|
|
0, 0, 0, 0, 0);
|
|
}
|
|
|
|
u64 hipz_h_error_data(const struct ipz_adapter_handle adapter_handle,
|
|
const u64 ressource_handle,
|
|
void *rblock,
|
|
unsigned long *byte_count)
|
|
{
|
|
u64 r_cb = virt_to_abs(rblock);
|
|
|
|
if (r_cb & (EHCA_PAGESIZE-1)) {
|
|
ehca_gen_err("rblock not page aligned.");
|
|
return H_PARAMETER;
|
|
}
|
|
|
|
return ehca_plpar_hcall_norets(H_ERROR_DATA,
|
|
adapter_handle.handle,
|
|
ressource_handle,
|
|
r_cb,
|
|
0, 0, 0, 0);
|
|
}
|