177 lines
3.6 KiB
Plaintext
177 lines
3.6 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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config OPENRISC
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def_bool y
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select OF
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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select HAVE_MEMBLOCK
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select ARCH_REQUIRE_GPIOLIB
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select HAVE_ARCH_TRACEHOOK
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select GENERIC_IRQ_CHIP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_IOMAP
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select GENERIC_CPU_DEVICES
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select MODULES_USE_ELF_RELA
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select HAVE_DEBUG_STACKOVERFLOW
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config MMU
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def_bool y
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config HAVE_DMA_ATTRS
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def_bool y
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config UID16
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def_bool y
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config RWSEM_GENERIC_SPINLOCK
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def_bool y
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config RWSEM_XCHGADD_ALGORITHM
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def_bool n
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config GENERIC_HWEIGHT
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def_bool y
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config NO_IOPORT_MAP
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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# For now, use generic checksum functions
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#These can be reimplemented in assembly later if so inclined
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config GENERIC_CSUM
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def_bool y
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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menu "Processor type and features"
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choice
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prompt "Subarchitecture"
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default OR1K_1200
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config OR1K_1200
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bool "OR1200"
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help
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Generic OpenRISC 1200 architecture
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endchoice
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config OPENRISC_BUILTIN_DTB
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string "Builtin DTB"
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default ""
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menu "Class II Instructions"
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config OPENRISC_HAVE_INST_FF1
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bool "Have instruction l.ff1"
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default y
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help
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Select this if your implementation has the Class II instruction l.ff1
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config OPENRISC_HAVE_INST_FL1
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bool "Have instruction l.fl1"
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default y
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help
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Select this if your implementation has the Class II instruction l.fl1
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config OPENRISC_HAVE_INST_MUL
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bool "Have instruction l.mul for hardware multiply"
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default y
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help
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Select this if your implementation has a hardware multiply instruction
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config OPENRISC_HAVE_INST_DIV
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bool "Have instruction l.div for hardware divide"
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default y
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help
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Select this if your implementation has a hardware divide instruction
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endmenu
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source kernel/Kconfig.hz
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source kernel/Kconfig.preempt
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source "mm/Kconfig"
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config OPENRISC_NO_SPR_SR_DSX
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bool "use SPR_SR_DSX software emulation" if OR1K_1200
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default y
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help
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SPR_SR_DSX bit is status register bit indicating whether
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the last exception has happened in delay slot.
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OpenRISC architecture makes it optional to have it implemented
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in hardware and the OR1200 does not have it.
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Say N here if you know that your OpenRISC processor has
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SPR_SR_DSX bit implemented. Say Y if you are unsure.
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config CMDLINE
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string "Default kernel command string"
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default ""
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help
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On some architectures there is currently no way for the boot loader
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to pass arguments to the kernel. For these architectures, you should
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supply some command-line options at build time by entering them
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here.
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menu "Debugging options"
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config JUMP_UPON_UNHANDLED_EXCEPTION
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bool "Try to die gracefully"
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default y
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help
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Now this puts kernel into infinite loop after first oops. Till
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your kernel crashes this doesn't have any influence.
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Say Y if you are unsure.
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config OPENRISC_ESR_EXCEPTION_BUG_CHECK
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bool "Check for possible ESR exception bug"
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default n
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help
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This option enables some checks that might expose some problems
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in kernel.
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Say N if you are unsure.
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endmenu
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endmenu
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menu "Executable file formats"
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source "fs/Kconfig.binfmt"
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endmenu
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source "net/Kconfig"
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source "drivers/Kconfig"
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source "fs/Kconfig"
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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menu "Kernel hacking"
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source "lib/Kconfig.debug"
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endmenu
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