acrn-kernel/arch/mips/sni
Maciej W. Rozycki 8ff374b9c2 MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-18 20:25:19 +02:00
..
Makefile
Platform
a20r.c serial: sccnxp: Using CLK API for getting UART clock 2013-07-31 18:08:01 -07:00
eisa.c
irq.c
pcimt.c
pcit.c
reset.c
rm200.c
setup.c MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks 2013-09-18 20:25:19 +02:00
time.c