277 lines
6.2 KiB
C
277 lines
6.2 KiB
C
/*
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* SMC 37C93X initialization code
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <asm/hwrpb.h>
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#include <asm/io.h>
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#include <asm/segment.h>
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#define SMC_DEBUG 0
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#if SMC_DEBUG
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# define DBG_DEVS(args) printk args
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#else
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# define DBG_DEVS(args)
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#endif
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#define KB 1024
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#define MB (1024*KB)
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#define GB (1024*MB)
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/* device "activate" register contents */
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#define DEVICE_ON 1
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#define DEVICE_OFF 0
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/* configuration on/off keys */
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#define CONFIG_ON_KEY 0x55
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#define CONFIG_OFF_KEY 0xaa
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/* configuration space device definitions */
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#define FDC 0
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#define IDE1 1
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#define IDE2 2
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#define PARP 3
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#define SER1 4
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#define SER2 5
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#define RTCL 6
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#define KYBD 7
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#define AUXIO 8
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/* Chip register offsets from base */
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#define CONFIG_CONTROL 0x02
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#define INDEX_ADDRESS 0x03
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#define LOGICAL_DEVICE_NUMBER 0x07
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#define DEVICE_ID 0x20
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#define DEVICE_REV 0x21
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#define POWER_CONTROL 0x22
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#define POWER_MGMT 0x23
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#define OSC 0x24
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#define ACTIVATE 0x30
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#define ADDR_HI 0x60
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#define ADDR_LO 0x61
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#define INTERRUPT_SEL 0x70
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#define INTERRUPT_SEL_2 0x72 /* KYBD/MOUS only */
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#define DMA_CHANNEL_SEL 0x74 /* FDC/PARP only */
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#define FDD_MODE_REGISTER 0x90
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#define FDD_OPTION_REGISTER 0x91
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/* values that we read back that are expected ... */
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#define VALID_DEVICE_ID 2
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/* default device addresses */
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#define KYBD_INTERRUPT 1
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#define MOUS_INTERRUPT 12
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#define COM2_BASE 0x2f8
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#define COM2_INTERRUPT 3
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#define COM1_BASE 0x3f8
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#define COM1_INTERRUPT 4
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#define PARP_BASE 0x3bc
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#define PARP_INTERRUPT 7
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static unsigned long __init SMCConfigState(unsigned long baseAddr)
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{
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unsigned char devId;
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unsigned char devRev;
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unsigned long configPort;
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unsigned long indexPort;
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unsigned long dataPort;
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int i;
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configPort = indexPort = baseAddr;
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dataPort = configPort + 1;
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#define NUM_RETRIES 5
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for (i = 0; i < NUM_RETRIES; i++)
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{
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outb(CONFIG_ON_KEY, configPort);
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outb(CONFIG_ON_KEY, configPort);
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outb(DEVICE_ID, indexPort);
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devId = inb(dataPort);
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if (devId == VALID_DEVICE_ID) {
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outb(DEVICE_REV, indexPort);
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devRev = inb(dataPort);
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break;
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}
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else
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udelay(100);
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}
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return (i != NUM_RETRIES) ? baseAddr : 0L;
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}
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static void __init SMCRunState(unsigned long baseAddr)
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{
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outb(CONFIG_OFF_KEY, baseAddr);
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}
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static unsigned long __init SMCDetectUltraIO(void)
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{
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unsigned long baseAddr;
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baseAddr = 0x3F0;
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if ( ( baseAddr = SMCConfigState( baseAddr ) ) == 0x3F0 ) {
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return( baseAddr );
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}
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baseAddr = 0x370;
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if ( ( baseAddr = SMCConfigState( baseAddr ) ) == 0x370 ) {
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return( baseAddr );
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}
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return( ( unsigned long )0 );
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}
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static void __init SMCEnableDevice(unsigned long baseAddr,
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unsigned long device,
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unsigned long portaddr,
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unsigned long interrupt)
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{
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unsigned long indexPort;
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unsigned long dataPort;
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indexPort = baseAddr;
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dataPort = baseAddr + 1;
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outb(LOGICAL_DEVICE_NUMBER, indexPort);
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outb(device, dataPort);
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outb(ADDR_LO, indexPort);
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outb(( portaddr & 0xFF ), dataPort);
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outb(ADDR_HI, indexPort);
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outb((portaddr >> 8) & 0xFF, dataPort);
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outb(INTERRUPT_SEL, indexPort);
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outb(interrupt, dataPort);
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outb(ACTIVATE, indexPort);
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outb(DEVICE_ON, dataPort);
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}
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static void __init SMCEnableKYBD(unsigned long baseAddr)
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{
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unsigned long indexPort;
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unsigned long dataPort;
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indexPort = baseAddr;
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dataPort = baseAddr + 1;
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outb(LOGICAL_DEVICE_NUMBER, indexPort);
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outb(KYBD, dataPort);
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outb(INTERRUPT_SEL, indexPort); /* Primary interrupt select */
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outb(KYBD_INTERRUPT, dataPort);
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outb(INTERRUPT_SEL_2, indexPort); /* Secondary interrupt select */
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outb(MOUS_INTERRUPT, dataPort);
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outb(ACTIVATE, indexPort);
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outb(DEVICE_ON, dataPort);
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}
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static void __init SMCEnableFDC(unsigned long baseAddr)
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{
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unsigned long indexPort;
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unsigned long dataPort;
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unsigned char oldValue;
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indexPort = baseAddr;
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dataPort = baseAddr + 1;
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outb(LOGICAL_DEVICE_NUMBER, indexPort);
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outb(FDC, dataPort);
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outb(FDD_MODE_REGISTER, indexPort);
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oldValue = inb(dataPort);
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oldValue |= 0x0E; /* Enable burst mode */
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outb(oldValue, dataPort);
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outb(INTERRUPT_SEL, indexPort); /* Primary interrupt select */
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outb(0x06, dataPort );
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outb(DMA_CHANNEL_SEL, indexPort); /* DMA channel select */
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outb(0x02, dataPort);
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outb(ACTIVATE, indexPort);
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outb(DEVICE_ON, dataPort);
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}
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#if SMC_DEBUG
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static void __init SMCReportDeviceStatus(unsigned long baseAddr)
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{
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unsigned long indexPort;
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unsigned long dataPort;
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unsigned char currentControl;
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indexPort = baseAddr;
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dataPort = baseAddr + 1;
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outb(POWER_CONTROL, indexPort);
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currentControl = inb(dataPort);
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printk(currentControl & (1 << FDC)
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? "\t+FDC Enabled\n" : "\t-FDC Disabled\n");
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printk(currentControl & (1 << IDE1)
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? "\t+IDE1 Enabled\n" : "\t-IDE1 Disabled\n");
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printk(currentControl & (1 << IDE2)
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? "\t+IDE2 Enabled\n" : "\t-IDE2 Disabled\n");
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printk(currentControl & (1 << PARP)
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? "\t+PARP Enabled\n" : "\t-PARP Disabled\n");
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printk(currentControl & (1 << SER1)
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? "\t+SER1 Enabled\n" : "\t-SER1 Disabled\n");
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printk(currentControl & (1 << SER2)
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? "\t+SER2 Enabled\n" : "\t-SER2 Disabled\n");
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printk( "\n" );
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}
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#endif
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int __init SMC93x_Init(void)
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{
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unsigned long SMCUltraBase;
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unsigned long flags;
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local_irq_save(flags);
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if ((SMCUltraBase = SMCDetectUltraIO()) != 0UL) {
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#if SMC_DEBUG
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SMCReportDeviceStatus(SMCUltraBase);
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#endif
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SMCEnableDevice(SMCUltraBase, SER1, COM1_BASE, COM1_INTERRUPT);
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DBG_DEVS(("SMC FDC37C93X: SER1 done\n"));
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SMCEnableDevice(SMCUltraBase, SER2, COM2_BASE, COM2_INTERRUPT);
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DBG_DEVS(("SMC FDC37C93X: SER2 done\n"));
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SMCEnableDevice(SMCUltraBase, PARP, PARP_BASE, PARP_INTERRUPT);
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DBG_DEVS(("SMC FDC37C93X: PARP done\n"));
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/* On PC164, IDE on the SMC is not enabled;
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CMD646 (PCI) on MB */
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SMCEnableKYBD(SMCUltraBase);
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DBG_DEVS(("SMC FDC37C93X: KYB done\n"));
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SMCEnableFDC(SMCUltraBase);
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DBG_DEVS(("SMC FDC37C93X: FDC done\n"));
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#if SMC_DEBUG
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SMCReportDeviceStatus(SMCUltraBase);
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#endif
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SMCRunState(SMCUltraBase);
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local_irq_restore(flags);
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printk("SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n",
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SMCUltraBase);
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return 1;
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}
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else {
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local_irq_restore(flags);
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DBG_DEVS(("No SMC FDC37C93X Ultra I/O Controller found\n"));
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return 0;
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}
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}
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