6656920b0b
Add support for processors that have cache-aliasing issues, such as the Stretch S5000 processor. Cache-aliasing means that the size of the cache (for one way) is larger than the page size, thus, a page can end up in several places in cache depending on the virtual to physical translation. The method used here is to map a user page temporarily through the auto-refill way 0 and of of the DTLB. We probably will want to revisit this issue and use a better approach with kmap/kunmap. Signed-off-by: Chris Zankel <chris@zankel.net> |
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| .. | ||
| Makefile | ||
| cache.c | ||
| fault.c | ||
| init.c | ||
| misc.S | ||
| pgtable.c | ||
| tlb.c | ||