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acrn-kernel/drivers/fpga
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Colin Ian King ee794221a6
fpga: fpga-mgr: Fix spelling mistake "bitsream" -> "bitstream" 
There is an spelling mistake in a dev_err message. Fix it.

Fixes: 3cc624beba ("fpga: fpga-mgr: support bitstream offset in image buffer")
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://lore.kernel.org/r/20220624081409.14760-1-colin.i.king@gmail.com
[yilun.xu@intel.com: add the Fixes tag]
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
 		2022-06-29 15:18:18 +08:00
..
Kconfig fpga: microchip-spi: add Microchip MPF FPGA manager 2022-06-24 12:12:31 +08:00
Makefile fpga: microchip-spi: add Microchip MPF FPGA manager 2022-06-24 12:12:31 +08:00
altera-cvp.c
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altera-fpga2sdram.c
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altera-freeze-bridge.c
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altera-hps2fpga.c
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altera-pr-ip-core-plat.c
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altera-pr-ip-core.c fpga: altera-pr-ip: fix unsigned comparison with less than zero 2022-06-10 15:48:23 +08:00
altera-ps-spi.c
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dfl-afu-dma-region.c
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dfl-afu-error.c
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dfl-afu-main.c
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dfl-afu-region.c
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dfl-afu.h
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dfl-fme-br.c
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dfl-fme-error.c
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dfl-fme-main.c
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dfl-fme-mgr.c
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dfl-fme-perf.c
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dfl-fme-pr.c
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dfl-fme-pr.h
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dfl-fme-region.c fpga: region: Use standard dev_release for class driver 2021-11-28 14:02:41 -08:00
dfl-fme.h
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dfl-n3000-nios.c
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dfl-pci.c fpga: dfl: Allow Port to be linked to FME's DFL 2022-05-10 16:05:38 +08:00
dfl.c fpga: Directly use ida_alloc()/free() 2022-06-08 17:04:39 +08:00
dfl.h fpga: dfl: Allow Port to be linked to FME's DFL 2022-05-10 16:05:38 +08:00
fpga-bridge.c fpga: Directly use ida_alloc()/free() 2022-06-08 17:04:39 +08:00
fpga-mgr.c fpga: fpga-mgr: Fix spelling mistake "bitsream" -> "bitstream" 2022-06-29 15:18:18 +08:00
fpga-region.c fpga: Directly use ida_alloc()/free() 2022-06-08 17:04:39 +08:00
ice40-spi.c
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intel-m10-bmc-sec-update.c fpga: m10bmc-sec: add max10 secure update functions 2022-06-08 17:04:39 +08:00
machxo2-spi.c
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microchip-spi.c fpga: microchip-spi: add Microchip MPF FPGA manager 2022-06-24 12:12:31 +08:00
of-fpga-region.c fpga: fpga-region: fix kernel-doc formatting issues 2022-05-10 16:05:00 +08:00
socfpga-a10.c
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socfpga.c
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stratix10-soc.c fpga: stratix10-soc: Do not use ret uninitialized in s10_probe() 2021-12-02 20:07:17 -08:00
ts73xx-fpga.c
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versal-fpga.c
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xilinx-pr-decoupler.c
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xilinx-spi.c
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zynq-fpga.c
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zynqmp-fpga.c
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