382 lines
11 KiB
YAML
382 lines
11 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MMC Controller Generic Binding
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maintainers:
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- Ulf Hansson <ulf.hansson@linaro.org>
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description: |
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These properties are common to multiple MMC host controllers. Any host
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that requires the respective functionality should implement them using
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these definitions.
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It is possible to assign a fixed index mmcN to an MMC host controller
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(and the corresponding mmcblkN devices) by defining an alias in the
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/aliases device tree node.
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properties:
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$nodename:
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pattern: "^mmc(@.*)?$"
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"#address-cells":
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const: 1
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description: |
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The cell is the slot ID if a function subnode is used.
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"#size-cells":
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const: 0
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# Card Detection.
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# If none of these properties are supplied, the host native card
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# detect will be used. Only one of them should be provided.
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broken-cd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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There is no card detection available; polling must be used.
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cd-gpios:
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maxItems: 1
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description:
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The card detection will be done using the GPIO provided.
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non-removable:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Non-removable slot (like eMMC); assume always present.
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# *NOTE* on CD and WP polarity. To use common for all SD/MMC host
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# controllers line polarity properties, we have to fix the meaning
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# of the "normal" and "inverted" line levels. We choose to follow
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# the SDHCI standard, which specifies both those lines as "active
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# low." Therefore, using the "cd-inverted" property means, that the
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# CD line is active high, i.e. it is high, when a card is
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# inserted. Similar logic applies to the "wp-inverted" property.
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#
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# CD and WP lines can be implemented on the hardware in one of two
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# ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
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# as dedicated pins. Polarity of dedicated pins can be specified,
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# using *-inverted properties. GPIO polarity can also be specified
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# using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
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# latter case. We choose to use the XOR logic for GPIO CD and WP
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# lines. This means, the two properties are "superimposed," for
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# example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
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# respective *-inverted property property results in a
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# double-inversion and actually means the "normal" line polarity is
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# in effect.
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wp-inverted:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The Write Protect line polarity is inverted.
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cd-inverted:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The CD line polarity is inverted.
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# Other properties
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bus-width:
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description:
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Number of data lines.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 4, 8]
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default: 1
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max-frequency:
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description:
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Maximum operating frequency of the bus.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 400000
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maximum: 200000000
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disable-wp:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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When set, no physical write-protect line is present. This
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property should only be specified when the controller has a
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dedicated write-protect detection logic. If a GPIO is always used
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for the write-protect detection logic, it is sufficient to not
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specify the wp-gpios property in the absence of a write-protect
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line. Not used in combination with eMMC or SDIO.
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wp-gpios:
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maxItems: 1
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description:
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GPIO to use for the write-protect detection.
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cd-debounce-delay-ms:
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description:
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Set delay time before detecting card after card insert
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interrupt.
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no-1-8-v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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When specified, denotes that 1.8V card voltage is not supported
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on this system, even if the controller claims it.
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cap-sd-highspeed:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD high-speed timing is supported.
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cap-mmc-highspeed:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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MMC high-speed timing is supported.
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sd-uhs-sdr12:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD UHS SDR12 speed is supported.
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sd-uhs-sdr25:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD UHS SDR25 speed is supported.
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sd-uhs-sdr50:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD UHS SDR50 speed is supported.
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sd-uhs-sdr104:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD UHS SDR104 speed is supported.
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sd-uhs-ddr50:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SD UHS DDR50 speed is supported.
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cap-power-off-card:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Powering off the card is safe.
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cap-mmc-hw-reset:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC hardware reset is supported
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cap-sdio-irq:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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enable SDIO IRQ signalling on this interface
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full-pwr-cycle:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Full power cycle of the card is supported.
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full-pwr-cycle-in-suspend:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Full power cycle of the card in suspend is supported.
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mmc-ddr-1_2v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC high-speed DDR mode (1.2V I/O) is supported.
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mmc-ddr-1_8v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC high-speed DDR mode (1.8V I/O) is supported.
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mmc-ddr-3_3v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC high-speed DDR mode (3.3V I/O) is supported.
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mmc-hs200-1_2v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC HS200 mode (1.2V I/O) is supported.
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mmc-hs200-1_8v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC HS200 mode (1.8V I/O) is supported.
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mmc-hs400-1_2v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC HS400 mode (1.2V I/O) is supported.
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mmc-hs400-1_8v:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC HS400 mode (1.8V I/O) is supported.
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mmc-hs400-enhanced-strobe:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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eMMC HS400 enhanced strobe mode is supported
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no-mmc-hs400:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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All eMMC HS400 modes are not supported.
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dsr:
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description:
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Value the card Driver Stage Register (DSR) should be programmed
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with.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 0xffff
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no-sdio:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Controller is limited to send SDIO commands during
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initialization.
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no-sd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Controller is limited to send SD commands during initialization.
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no-mmc:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Controller is limited to send MMC commands during
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initialization.
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fixed-emmc-driver-type:
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description:
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For non-removable eMMC, enforce this driver type. The value is
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the driver type as specified in the eMMC specification (table
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206 in spec version 5.1)
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 4
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post-power-on-delay-ms:
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description:
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It was invented for MMC pwrseq-simple which could be referred to
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mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay
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waiting for I/O signalling and card power supply to be stable,
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regardless of whether pwrseq-simple is used. Default to 10ms if
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no available.
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default: 10
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supports-cqe:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The presence of this property indicates that the corresponding
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MMC host controller supports HW command queue feature.
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disable-cqe-dcmd:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The presence of this property indicates that the MMC
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controller\'s command queue engine (CQE) does not support direct
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commands (DCMDs).
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keep-power-in-suspend:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SDIO only. Preserves card power during a suspend/resume cycle.
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# Deprecated: enable-sdio-wakeup
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wakeup-source:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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SDIO only. Enables wake up of host system on SDIO IRQ assertion.
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vmmc-supply:
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description:
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Supply for the card power
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vqmmc-supply:
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description:
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Supply for the bus IO line power, such as a level shifter.
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If the level shifter is controlled by a GPIO line, this shall
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be modeled as a "regulator-fixed" with a GPIO line for
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switching the level shifter on/off.
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mmc-pwrseq:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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System-on-Chip designs may specify a specific MMC power
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sequence. To successfully detect an (e)MMC/SD/SDIO card, that
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power sequence must be maintained while initializing the card.
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patternProperties:
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"^.*@[0-9]+$":
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type: object
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description: |
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On embedded systems the cards connected to a host may need
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additional properties. These can be specified in subnodes to the
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host controller node. The subnodes are identified by the
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standard \'reg\' property. Which information exactly can be
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specified depends on the bindings for the SDIO function driver
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for the subnode, as specified by the compatible string.
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properties:
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compatible:
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description: |
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Name of SDIO function following generic names recommended
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practice
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reg:
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items:
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- minimum: 0
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maximum: 7
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description:
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Must contain the SDIO function number of the function this
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subnode describes. A value of 0 denotes the memory SD
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function, values from 1 to 7 denote the SDIO functions.
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required:
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- reg
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"^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 2
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maxItems: 2
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items:
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minimum: 0
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maximum: 359
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description:
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Set the clock (phase) delays which are to be configured in the
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controller while switching to particular speed mode. These values
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are in pair of degrees.
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dependencies:
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cd-debounce-delay-ms: [ cd-gpios ]
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fixed-emmc-driver-type: [ non-removable ]
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additionalProperties: true
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examples:
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- |
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mmc3: mmc@1c12000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1c12000 0x200>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc3_pins_a>;
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vmmc-supply = <®_vmmc3>;
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bus-width = <4>;
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non-removable;
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mmc-pwrseq = <&sdhci0_pwrseq>;
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brcmf: wifi@1 {
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reg = <1>;
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compatible = "brcm,bcm4329-fmac";
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interrupt-parent = <&pio>;
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interrupts = <10 8>;
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interrupt-names = "host-wake";
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};
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};
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