5aba179c34
This happens when do stress test of uvc stream on/off which will enable/disable endpoints. uvc has four tx requests, and may disable endpoint between queue tx requests as following: enable ep --> start qmu queue tx request0 queue tx request1 queue tx request2 --> resume qmu disable ep --> stop qmu may fail [1] queue tx request3 --> will resume qmu, may cause qmu can't work when enable ep next time [2] [1]: when the tx fifo has some data to transmit, and try to stop qmu (stop ep) meanwhile resume qmu (queue tx request), it may cause stop qmu timeout, then can be fixed by flushing fifo when stop qmu. [2]: it resumes qmu again, shall stop qmu again. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reported-by: Min Guo <min.guo@mediatek.com> Link: https://lore.kernel.org/r/20230119033322.21426-1-chunfeng.yun@mediatek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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.. | ||
Kconfig | ||
Makefile | ||
mtu3.h | ||
mtu3_core.c | ||
mtu3_debug.h | ||
mtu3_debugfs.c | ||
mtu3_dr.c | ||
mtu3_dr.h | ||
mtu3_gadget.c | ||
mtu3_gadget_ep0.c | ||
mtu3_host.c | ||
mtu3_hw_regs.h | ||
mtu3_plat.c | ||
mtu3_qmu.c | ||
mtu3_qmu.h | ||
mtu3_trace.c | ||
mtu3_trace.h |