176 lines
4.2 KiB
C
176 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/slab.h>
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#include <linux/pci-acpi.h>
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#include <linux/pci-ecam.h>
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#include <asm/pci.h>
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#include <asm/numa.h>
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#include <asm/loongson.h>
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struct pci_root_info {
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struct acpi_pci_root_info common;
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struct pci_config_window *cfg;
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};
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void pcibios_add_bus(struct pci_bus *bus)
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{
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acpi_pci_add_bus(bus);
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}
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int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
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{
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struct pci_config_window *cfg = bridge->bus->sysdata;
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struct acpi_device *adev = to_acpi_device(cfg->parent);
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struct device *bus_dev = &bridge->bus->dev;
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ACPI_COMPANION_SET(&bridge->dev, adev);
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set_dev_node(bus_dev, pa_to_nid(cfg->res.start));
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return 0;
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}
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int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
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{
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struct pci_config_window *cfg = bus->sysdata;
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struct acpi_device *adev = to_acpi_device(cfg->parent);
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struct acpi_pci_root *root = acpi_driver_data(adev);
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return root->segment;
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}
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static void acpi_release_root_info(struct acpi_pci_root_info *ci)
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{
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struct pci_root_info *info;
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info = container_of(ci, struct pci_root_info, common);
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pci_ecam_free(info->cfg);
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kfree(ci->ops);
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kfree(info);
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}
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static int acpi_prepare_root_resources(struct acpi_pci_root_info *ci)
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{
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int status;
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struct resource_entry *entry, *tmp;
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struct acpi_device *device = ci->bridge;
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status = acpi_pci_probe_root_resources(ci);
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if (status > 0) {
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
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if (entry->res->flags & IORESOURCE_MEM) {
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entry->offset = ci->root->mcfg_addr & GENMASK_ULL(63, 40);
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entry->res->start |= entry->offset;
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entry->res->end |= entry->offset;
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}
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}
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return status;
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}
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resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
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dev_dbg(&device->dev,
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"host bridge window %pR (ignored)\n", entry->res);
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resource_list_destroy_entry(entry);
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}
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return 0;
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}
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/*
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* Lookup the bus range for the domain in MCFG, and set up config space
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* mapping.
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*/
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static struct pci_config_window *
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pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
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{
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int ret, bus_shift;
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u16 seg = root->segment;
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struct device *dev = &root->device->dev;
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struct resource cfgres;
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struct resource *bus_res = &root->secondary;
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struct pci_config_window *cfg;
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const struct pci_ecam_ops *ecam_ops;
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ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops);
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if (ret < 0) {
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dev_err(dev, "%04x:%pR ECAM region not found, use default value\n", seg, bus_res);
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ecam_ops = &loongson_pci_ecam_ops;
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root->mcfg_addr = mcfg_addr_init(0);
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}
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bus_shift = ecam_ops->bus_shift ? : 20;
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cfgres.start = root->mcfg_addr + (bus_res->start << bus_shift);
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cfgres.end = cfgres.start + (resource_size(bus_res) << bus_shift) - 1;
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cfgres.flags = IORESOURCE_MEM;
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cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops);
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if (IS_ERR(cfg)) {
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dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, PTR_ERR(cfg));
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return NULL;
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}
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return cfg;
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}
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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struct pci_bus *bus;
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struct pci_root_info *info;
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struct acpi_pci_root_ops *root_ops;
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int domain = root->segment;
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int busnum = root->secondary.start;
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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if (!info) {
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pr_warn("pci_bus %04x:%02x: ignored (out of memory)\n", domain, busnum);
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return NULL;
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}
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root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL);
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if (!root_ops) {
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kfree(info);
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return NULL;
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}
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info->cfg = pci_acpi_setup_ecam_mapping(root);
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if (!info->cfg) {
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kfree(info);
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kfree(root_ops);
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return NULL;
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}
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root_ops->release_info = acpi_release_root_info;
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root_ops->prepare_resources = acpi_prepare_root_resources;
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root_ops->pci_ops = (struct pci_ops *)&info->cfg->ops->pci_ops;
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bus = pci_find_bus(domain, busnum);
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if (bus) {
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memcpy(bus->sysdata, info->cfg, sizeof(struct pci_config_window));
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kfree(info);
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} else {
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struct pci_bus *child;
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bus = acpi_pci_root_create(root, root_ops,
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&info->common, info->cfg);
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if (!bus) {
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kfree(info);
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kfree(root_ops);
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return NULL;
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}
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pci_bus_size_bridges(bus);
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pci_bus_assign_resources(bus);
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list_for_each_entry(child, &bus->children, node)
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pcie_bus_configure_settings(child);
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}
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return bus;
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}
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