acrn-kernel/include/asm-cris/arch-v10/cache.h

9 lines
180 B
C

#ifndef _ASM_ARCH_CACHE_H
#define _ASM_ARCH_CACHE_H
/* Etrax 100LX have 32-byte cache-lines. */
#define L1_CACHE_BYTES 32
#define L1_CACHE_SHIFT 5
#endif /* _ASM_ARCH_CACHE_H */