519 lines
13 KiB
C
519 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Kernel Probes (KProbes)
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* arch/mips/kernel/kprobes.c
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*
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* Copyright 2006 Sony Corp.
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* Copyright 2010 Cavium Networks
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*
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* Some portions copied from the powerpc version.
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*
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* Copyright (C) IBM Corporation, 2002, 2004
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*/
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#include <linux/kprobes.h>
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#include <linux/preempt.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
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#include <linux/slab.h>
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#include <asm/ptrace.h>
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#include <asm/branch.h>
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#include <asm/break.h>
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#include "probes-common.h"
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static const union mips_instruction breakpoint_insn = {
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.b_format = {
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.opcode = spec_op,
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.code = BRK_KPROBE_BP,
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.func = break_op
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}
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};
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static const union mips_instruction breakpoint2_insn = {
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.b_format = {
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.opcode = spec_op,
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.code = BRK_KPROBE_SSTEPBP,
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.func = break_op
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}
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};
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DEFINE_PER_CPU(struct kprobe *, current_kprobe);
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DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
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static int __kprobes insn_has_delayslot(union mips_instruction insn)
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{
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return __insn_has_delay_slot(insn);
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}
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/*
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* insn_has_ll_or_sc function checks whether instruction is ll or sc
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* one; putting breakpoint on top of atomic ll/sc pair is bad idea;
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* so we need to prevent it and refuse kprobes insertion for such
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* instructions; cannot do much about breakpoint in the middle of
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* ll/sc pair; it is upto user to avoid those places
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*/
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static int __kprobes insn_has_ll_or_sc(union mips_instruction insn)
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{
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int ret = 0;
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switch (insn.i_format.opcode) {
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case ll_op:
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case lld_op:
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case sc_op:
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case scd_op:
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ret = 1;
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break;
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default:
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break;
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}
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return ret;
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}
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int __kprobes arch_prepare_kprobe(struct kprobe *p)
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{
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union mips_instruction insn;
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union mips_instruction prev_insn;
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int ret = 0;
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insn = p->addr[0];
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if (insn_has_ll_or_sc(insn)) {
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pr_notice("Kprobes for ll and sc instructions are not"
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"supported\n");
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ret = -EINVAL;
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goto out;
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}
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if (copy_from_kernel_nofault(&prev_insn, p->addr - 1,
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sizeof(mips_instruction)) == 0 &&
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insn_has_delayslot(prev_insn)) {
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pr_notice("Kprobes for branch delayslot are not supported\n");
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ret = -EINVAL;
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goto out;
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}
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if (__insn_is_compact_branch(insn)) {
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pr_notice("Kprobes for compact branches are not supported\n");
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ret = -EINVAL;
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goto out;
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}
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/* insn: must be on special executable page on mips. */
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p->ainsn.insn = get_insn_slot();
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if (!p->ainsn.insn) {
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ret = -ENOMEM;
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goto out;
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}
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/*
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* In the kprobe->ainsn.insn[] array we store the original
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* instruction at index zero and a break trap instruction at
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* index one.
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*
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* On MIPS arch if the instruction at probed address is a
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* branch instruction, we need to execute the instruction at
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* Branch Delayslot (BD) at the time of probe hit. As MIPS also
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* doesn't have single stepping support, the BD instruction can
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* not be executed in-line and it would be executed on SSOL slot
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* using a normal breakpoint instruction in the next slot.
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* So, read the instruction and save it for later execution.
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*/
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if (insn_has_delayslot(insn))
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memcpy(&p->ainsn.insn[0], p->addr + 1, sizeof(kprobe_opcode_t));
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else
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memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t));
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p->ainsn.insn[1] = breakpoint2_insn;
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p->opcode = *p->addr;
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out:
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return ret;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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*p->addr = breakpoint_insn;
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flush_insn_slot(p);
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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*p->addr = p->opcode;
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flush_insn_slot(p);
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}
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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if (p->ainsn.insn) {
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free_insn_slot(p->ainsn.insn, 0);
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p->ainsn.insn = NULL;
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}
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}
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static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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kcb->prev_kprobe.kp = kprobe_running();
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kcb->prev_kprobe.status = kcb->kprobe_status;
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kcb->prev_kprobe.old_SR = kcb->kprobe_old_SR;
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kcb->prev_kprobe.saved_SR = kcb->kprobe_saved_SR;
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kcb->prev_kprobe.saved_epc = kcb->kprobe_saved_epc;
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}
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static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
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kcb->kprobe_status = kcb->prev_kprobe.status;
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kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
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kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
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kcb->kprobe_saved_epc = kcb->prev_kprobe.saved_epc;
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}
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static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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__this_cpu_write(current_kprobe, p);
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kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
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kcb->kprobe_saved_epc = regs->cp0_epc;
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}
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/**
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* evaluate_branch_instrucion -
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*
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* Evaluate the branch instruction at probed address during probe hit. The
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* result of evaluation would be the updated epc. The insturction in delayslot
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* would actually be single stepped using a normal breakpoint) on SSOL slot.
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*
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* The result is also saved in the kprobe control block for later use,
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* in case we need to execute the delayslot instruction. The latter will be
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* false for NOP instruction in dealyslot and the branch-likely instructions
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* when the branch is taken. And for those cases we set a flag as
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* SKIP_DELAYSLOT in the kprobe control block
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*/
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static int evaluate_branch_instruction(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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union mips_instruction insn = p->opcode;
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long epc;
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int ret = 0;
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epc = regs->cp0_epc;
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if (epc & 3)
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goto unaligned;
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if (p->ainsn.insn->word == 0)
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kcb->flags |= SKIP_DELAYSLOT;
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else
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kcb->flags &= ~SKIP_DELAYSLOT;
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ret = __compute_return_epc_for_insn(regs, insn);
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if (ret < 0)
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return ret;
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if (ret == BRANCH_LIKELY_TAKEN)
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kcb->flags |= SKIP_DELAYSLOT;
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kcb->target_epc = regs->cp0_epc;
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return 0;
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unaligned:
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pr_notice("%s: unaligned epc - sending SIGBUS.\n", current->comm);
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force_sig(SIGBUS);
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return -EFAULT;
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}
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static void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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int ret = 0;
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regs->cp0_status &= ~ST0_IE;
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/* single step inline if the instruction is a break */
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if (p->opcode.word == breakpoint_insn.word ||
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p->opcode.word == breakpoint2_insn.word)
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regs->cp0_epc = (unsigned long)p->addr;
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else if (insn_has_delayslot(p->opcode)) {
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ret = evaluate_branch_instruction(p, regs, kcb);
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if (ret < 0) {
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pr_notice("Kprobes: Error in evaluating branch\n");
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return;
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}
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}
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regs->cp0_epc = (unsigned long)&p->ainsn.insn[0];
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}
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/*
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* Called after single-stepping. p->addr is the address of the
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* instruction whose first byte has been replaced by the "break 0"
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* instruction. To avoid the SMP problems that can occur when we
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* temporarily put back the original opcode to single-step, we
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* single-stepped a copy of the instruction. The address of this
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* copy is p->ainsn.insn.
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*
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* This function prepares to return from the post-single-step
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* breakpoint trap. In case of branch instructions, the target
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* epc to be restored.
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*/
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static void __kprobes resume_execution(struct kprobe *p,
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struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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if (insn_has_delayslot(p->opcode))
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regs->cp0_epc = kcb->target_epc;
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else {
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unsigned long orig_epc = kcb->kprobe_saved_epc;
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regs->cp0_epc = orig_epc + 4;
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}
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}
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static int __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p;
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int ret = 0;
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kprobe_opcode_t *addr;
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struct kprobe_ctlblk *kcb;
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addr = (kprobe_opcode_t *) regs->cp0_epc;
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/*
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* We don't want to be preempted for the entire
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* duration of kprobe processing
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*/
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preempt_disable();
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kcb = get_kprobe_ctlblk();
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/* Check we're not actually recursing */
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if (kprobe_running()) {
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p = get_kprobe(addr);
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if (p) {
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if (kcb->kprobe_status == KPROBE_HIT_SS &&
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p->ainsn.insn->word == breakpoint_insn.word) {
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regs->cp0_status &= ~ST0_IE;
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regs->cp0_status |= kcb->kprobe_saved_SR;
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goto no_kprobe;
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}
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/*
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* We have reentered the kprobe_handler(), since
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* another probe was hit while within the handler.
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* We here save the original kprobes variables and
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* just single step on the instruction of the new probe
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* without calling any user handlers.
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*/
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save_previous_kprobe(kcb);
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set_current_kprobe(p, regs, kcb);
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kprobes_inc_nmissed_count(p);
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prepare_singlestep(p, regs, kcb);
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kcb->kprobe_status = KPROBE_REENTER;
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if (kcb->flags & SKIP_DELAYSLOT) {
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resume_execution(p, regs, kcb);
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restore_previous_kprobe(kcb);
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preempt_enable_no_resched();
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}
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return 1;
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} else if (addr->word != breakpoint_insn.word) {
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/*
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* The breakpoint instruction was removed by
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* another cpu right after we hit, no further
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* handling of this interrupt is appropriate
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*/
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ret = 1;
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}
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goto no_kprobe;
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}
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p = get_kprobe(addr);
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if (!p) {
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if (addr->word != breakpoint_insn.word) {
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/*
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* The breakpoint instruction was removed right
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* after we hit it. Another cpu has removed
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* either a probepoint or a debugger breakpoint
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* at this address. In either case, no further
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* handling of this interrupt is appropriate.
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*/
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ret = 1;
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}
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/* Not one of ours: let kernel handle it */
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goto no_kprobe;
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}
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set_current_kprobe(p, regs, kcb);
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kcb->kprobe_status = KPROBE_HIT_ACTIVE;
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if (p->pre_handler && p->pre_handler(p, regs)) {
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/* handler has already set things up, so skip ss setup */
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reset_current_kprobe();
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preempt_enable_no_resched();
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return 1;
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}
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prepare_singlestep(p, regs, kcb);
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if (kcb->flags & SKIP_DELAYSLOT) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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if (p->post_handler)
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p->post_handler(p, regs, 0);
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resume_execution(p, regs, kcb);
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preempt_enable_no_resched();
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} else
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kcb->kprobe_status = KPROBE_HIT_SS;
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return 1;
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no_kprobe:
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preempt_enable_no_resched();
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return ret;
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}
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static inline int post_kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (!cur)
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return 0;
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if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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cur->post_handler(cur, regs, 0);
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}
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resume_execution(cur, regs, kcb);
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regs->cp0_status |= kcb->kprobe_saved_SR;
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/* Restore back the original saved kprobes variables and continue. */
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if (kcb->kprobe_status == KPROBE_REENTER) {
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restore_previous_kprobe(kcb);
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goto out;
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}
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reset_current_kprobe();
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out:
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preempt_enable_no_resched();
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return 1;
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}
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int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
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return 1;
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if (kcb->kprobe_status & KPROBE_HIT_SS) {
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resume_execution(cur, regs, kcb);
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regs->cp0_status |= kcb->kprobe_old_SR;
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reset_current_kprobe();
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preempt_enable_no_resched();
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}
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return 0;
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}
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/*
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* Wrapper routine for handling exceptions.
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*/
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int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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switch (val) {
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case DIE_BREAK:
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if (kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_SSTEPBP:
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if (post_kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_PAGE_FAULT:
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/* kprobe_running() needs smp_processor_id() */
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preempt_disable();
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if (kprobe_running()
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&& kprobe_fault_handler(args->regs, args->trapnr))
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ret = NOTIFY_STOP;
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preempt_enable();
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break;
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default:
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break;
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}
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return ret;
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}
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/*
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* Function return probe trampoline:
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* - init_kprobes() establishes a probepoint here
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* - When the probed function returns, this probe causes the
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* handlers to fire
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*/
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static void __used kretprobe_trampoline_holder(void)
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{
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asm volatile(
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".set push\n\t"
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/* Keep the assembler from reordering and placing JR here. */
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".set noreorder\n\t"
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"nop\n\t"
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".global kretprobe_trampoline\n"
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"kretprobe_trampoline:\n\t"
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"nop\n\t"
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".set pop"
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: : : "memory");
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}
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void kretprobe_trampoline(void);
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void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
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struct pt_regs *regs)
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{
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ri->ret_addr = (kprobe_opcode_t *) regs->regs[31];
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ri->fp = NULL;
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/* Replace the return addr with trampoline addr */
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regs->regs[31] = (unsigned long)kretprobe_trampoline;
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}
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/*
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* Called when the probe at kretprobe trampoline is hit
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*/
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static int __kprobes trampoline_probe_handler(struct kprobe *p,
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struct pt_regs *regs)
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{
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instruction_pointer(regs) = __kretprobe_trampoline_handler(regs,
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kretprobe_trampoline, NULL);
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/*
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* By returning a non-zero value, we are telling
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* kprobe_handler() that we don't want the post_handler
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* to run (and have re-enabled preemption)
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*/
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return 1;
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}
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int __kprobes arch_trampoline_kprobe(struct kprobe *p)
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{
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if (p->addr == (kprobe_opcode_t *)kretprobe_trampoline)
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return 1;
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return 0;
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}
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static struct kprobe trampoline_p = {
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.addr = (kprobe_opcode_t *)kretprobe_trampoline,
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.pre_handler = trampoline_probe_handler
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};
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int __init arch_init_kprobes(void)
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{
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return register_kprobe(&trampoline_p);
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}
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