124 lines
4.0 KiB
C
124 lines
4.0 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_TLBFLUSH_H
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#define _ASM_TILE_TLBFLUSH_H
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/page.h>
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#include <hv/hypervisor.h>
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/*
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* Rather than associating each mm with its own ASID, we just use
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* ASIDs to allow us to lazily flush the TLB when we switch mms.
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* This way we only have to do an actual TLB flush on mm switch
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* every time we wrap ASIDs, not every single time we switch.
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*
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* FIXME: We might improve performance by keeping ASIDs around
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* properly, though since the hypervisor direct-maps VAs to TSB
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* entries, we're likely to have lost at least the executable page
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* mappings by the time we switch back to the original mm.
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*/
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DECLARE_PER_CPU(int, current_asid);
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/* The hypervisor tells us what ASIDs are available to us. */
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extern int min_asid, max_asid;
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/* Pass as vma pointer for non-executable mapping, if no vma available. */
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#define FLUSH_NONEXEC ((struct vm_area_struct *)-1UL)
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/* Flush a single user page on this cpu. */
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static inline void local_flush_tlb_page(struct vm_area_struct *vma,
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unsigned long addr,
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unsigned long page_size)
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{
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int rc = hv_flush_page(addr, page_size);
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if (rc < 0)
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panic("hv_flush_page(%#lx,%#lx) failed: %d",
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addr, page_size, rc);
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if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
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__flush_icache();
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}
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/* Flush range of user pages on this cpu. */
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static inline void local_flush_tlb_pages(struct vm_area_struct *vma,
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unsigned long addr,
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unsigned long page_size,
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unsigned long len)
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{
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int rc = hv_flush_pages(addr, page_size, len);
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if (rc < 0)
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panic("hv_flush_pages(%#lx,%#lx,%#lx) failed: %d",
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addr, page_size, len, rc);
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if (!vma || (vma != FLUSH_NONEXEC && (vma->vm_flags & VM_EXEC)))
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__flush_icache();
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}
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/* Flush all user pages on this cpu. */
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static inline void local_flush_tlb(void)
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{
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int rc = hv_flush_all(1); /* preserve global mappings */
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if (rc < 0)
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panic("hv_flush_all(1) failed: %d", rc);
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__flush_icache();
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}
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/*
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* Global pages have to be flushed a bit differently. Not a real
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* performance problem because this does not happen often.
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*/
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static inline void local_flush_tlb_all(void)
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{
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int i;
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for (i = 0; ; ++i) {
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HV_VirtAddrRange r = hv_inquire_virtual(i);
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if (r.size == 0)
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break;
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local_flush_tlb_pages(NULL, r.start, PAGE_SIZE, r.size);
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local_flush_tlb_pages(NULL, r.start, HPAGE_SIZE, r.size);
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}
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}
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/*
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* TLB flushing:
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*
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* - flush_tlb() flushes the current mm struct TLBs
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* - flush_tlb_all() flushes all processes TLBs
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_range(vma, start, end) flushes a range of pages
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* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
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* - flush_tlb_others(cpumask, mm, va) flushes TLBs on other cpus
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*
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* Here (as in vm_area_struct), "end" means the first byte after
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* our end address.
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*/
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extern void flush_tlb_all(void);
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extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
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extern void flush_tlb_current_task(void);
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extern void flush_tlb_mm(struct mm_struct *);
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extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
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extern void flush_tlb_page_mm(struct vm_area_struct *,
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struct mm_struct *, unsigned long);
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extern void flush_tlb_range(struct vm_area_struct *,
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unsigned long start, unsigned long end);
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#define flush_tlb() flush_tlb_current_task()
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#endif /* _ASM_TILE_TLBFLUSH_H */
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