db7a346405
Add #clock-cells binding to model Sierra as clock provider and include clock IDs for PLL_CMNLC and PLL_CMNLC1. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210319124128.13308-12-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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| .. | ||
| phy-am654-serdes.h | ||
| phy-cadence.h | ||
| phy-lantiq-vrx200-pcie.h | ||
| phy-ocelot-serdes.h | ||
| phy-pistachio-usb.h | ||
| phy-qcom-qusb2.h | ||
| phy-ti.h | ||
| phy.h | ||