acrn-kernel/include/dt-bindings/interconnect/qcom,qcm2290.h

95 lines
2.3 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
/* QCM2290 interconnect IDs */
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCM2290_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_QCM2290_H
/* BIMC */
#define MASTER_APPSS_PROC 0
#define MASTER_SNOC_BIMC_RT 1
#define MASTER_SNOC_BIMC_NRT 2
#define MASTER_SNOC_BIMC 3
#define MASTER_TCU_0 4
#define MASTER_GFX3D 5
#define SLAVE_EBI1 6
#define SLAVE_BIMC_SNOC 7
/* CNOC */
#define MASTER_SNOC_CNOC 0
#define MASTER_QDSS_DAP 1
#define SLAVE_BIMC_CFG 2
#define SLAVE_CAMERA_NRT_THROTTLE_CFG 3
#define SLAVE_CAMERA_RT_THROTTLE_CFG 4
#define SLAVE_CAMERA_CFG 5
#define SLAVE_CLK_CTL 6
#define SLAVE_CRYPTO_0_CFG 7
#define SLAVE_DISPLAY_CFG 8
#define SLAVE_DISPLAY_THROTTLE_CFG 9
#define SLAVE_GPU_CFG 10
#define SLAVE_HWKM 11
#define SLAVE_IMEM_CFG 12
#define SLAVE_IPA_CFG 13
#define SLAVE_LPASS 14
#define SLAVE_MESSAGE_RAM 15
#define SLAVE_PDM 16
#define SLAVE_PIMEM_CFG 17
#define SLAVE_PKA_WRAPPER 18
#define SLAVE_PMIC_ARB 19
#define SLAVE_PRNG 20
#define SLAVE_QDSS_CFG 21
#define SLAVE_QM_CFG 22
#define SLAVE_QM_MPU_CFG 23
#define SLAVE_QPIC 24
#define SLAVE_QUP_0 25
#define SLAVE_SDCC_1 26
#define SLAVE_SDCC_2 27
#define SLAVE_SNOC_CFG 28
#define SLAVE_TCSR 29
#define SLAVE_USB3 30
#define SLAVE_VENUS_CFG 31
#define SLAVE_VENUS_THROTTLE_CFG 32
#define SLAVE_VSENSE_CTRL_CFG 33
#define SLAVE_SERVICE_CNOC 34
/* SNOC */
#define MASTER_CRYPTO_CORE0 0
#define MASTER_SNOC_CFG 1
#define MASTER_TIC 2
#define MASTER_ANOC_SNOC 3
#define MASTER_BIMC_SNOC 4
#define MASTER_PIMEM 5
#define MASTER_QDSS_BAM 6
#define MASTER_QUP_0 7
#define MASTER_IPA 8
#define MASTER_QDSS_ETR 9
#define MASTER_SDCC_1 10
#define MASTER_SDCC_2 11
#define MASTER_QPIC 12
#define MASTER_USB3_0 13
#define SLAVE_APPSS 14
#define SLAVE_SNOC_CNOC 15
#define SLAVE_IMEM 16
#define SLAVE_PIMEM 17
#define SLAVE_SNOC_BIMC 18
#define SLAVE_SERVICE_SNOC 19
#define SLAVE_QDSS_STM 20
#define SLAVE_TCU 21
#define SLAVE_ANOC_SNOC 22
/* QUP Virtual */
#define MASTER_QUP_CORE_0 0
#define SLAVE_QUP_CORE_0 1
/* MMNRT Virtual */
#define MASTER_CAMNOC_SF 0
#define MASTER_VIDEO_P0 1
#define MASTER_VIDEO_PROC 2
#define SLAVE_SNOC_BIMC_NRT 3
/* MMRT Virtual */
#define MASTER_CAMNOC_HF 0
#define MASTER_MDP0 1
#define SLAVE_SNOC_BIMC_RT 2
#endif