acrn-kernel/drivers/mtd/nand/raw/gpmi-nand
Han Xu d9edc4bc67 mtd: rawnand: gpmi: Add large oob bch setting support
The code change proposes a new way to set bch geometry for large oob
NAND (oobsize > 1KB). In this case, previous implementation can NOT
guarantee the bad block mark always locates in data chunk, so we need a
new way to do it. The general idea is,

1.Try all ECC strength from the maximum ecc that controller can support
  to minimum value required by NAND chip, any ECC strength makes the
  BBM locate in data chunk can be eligible.

2.If none of them works, using separate ECC for meta, which will add
  one extra ecc with the same ECC strength as other data chunks. This
  extra ECC can guarantee BBM located in data chunk, also we need to
  check if oob can afford it.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220412025246.24269-6-han.xu@nxp.com
2022-04-21 09:34:10 +02:00
..
Makefile mtd: rawnand: gpmi: cleanup makefile 2020-12-10 22:37:31 +01:00
bch-regs.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1 2019-05-21 11:28:39 +02:00
gpmi-nand.c mtd: rawnand: gpmi: Add large oob bch setting support 2022-04-21 09:34:10 +02:00
gpmi-nand.h mtd: rawnand: gpmi: Add large oob bch setting support 2022-04-21 09:34:10 +02:00
gpmi-regs.h mtd: rawnand: gpmi: Fix the driver only sense CS0 R/B issue 2020-12-10 22:37:33 +01:00