142 lines
3.5 KiB
C
142 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/mm_types.h>
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#include <linux/pgtable.h>
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#include <asm/cputype.h>
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#include <asm/idmap.h>
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#include <asm/hwcap.h>
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#include <asm/pgalloc.h>
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#include <asm/sections.h>
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#include <asm/system_info.h>
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/*
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* Note: accesses outside of the kernel image and the identity map area
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* are not supported on any CPU using the idmap tables as its current
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* page tables.
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*/
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pgd_t *idmap_pgd __ro_after_init;
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long long arch_phys_to_idmap_offset __ro_after_init;
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#ifdef CONFIG_ARM_LPAE
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static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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pmd_t *pmd;
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unsigned long next;
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if (pud_none_or_clear_bad(pud) || (pud_val(*pud) & L_PGD_SWAPPER)) {
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pmd = pmd_alloc_one(&init_mm, addr);
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if (!pmd) {
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pr_warn("Failed to allocate identity pmd.\n");
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return;
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}
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/*
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* Copy the original PMD to ensure that the PMD entries for
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* the kernel image are preserved.
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*/
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if (!pud_none(*pud))
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memcpy(pmd, pmd_offset(pud, 0),
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PTRS_PER_PMD * sizeof(pmd_t));
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pud_populate(&init_mm, pud, pmd);
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pmd += pmd_index(addr);
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} else
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pmd = pmd_offset(pud, addr);
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do {
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next = pmd_addr_end(addr, end);
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*pmd = __pmd((addr & PMD_MASK) | prot);
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flush_pmd_entry(pmd);
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} while (pmd++, addr = next, addr != end);
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}
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#else /* !CONFIG_ARM_LPAE */
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static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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pmd_t *pmd = pmd_offset(pud, addr);
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addr = (addr & PMD_MASK) | prot;
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pmd[0] = __pmd(addr);
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addr += SECTION_SIZE;
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pmd[1] = __pmd(addr);
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flush_pmd_entry(pmd);
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}
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#endif /* CONFIG_ARM_LPAE */
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static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end,
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unsigned long prot)
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{
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p4d_t *p4d = p4d_offset(pgd, addr);
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pud_t *pud = pud_offset(p4d, addr);
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unsigned long next;
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do {
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next = pud_addr_end(addr, end);
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idmap_add_pmd(pud, addr, next, prot);
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} while (pud++, addr = next, addr != end);
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}
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static void identity_mapping_add(pgd_t *pgd, const char *text_start,
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const char *text_end, unsigned long prot)
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{
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unsigned long addr, end;
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unsigned long next;
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addr = virt_to_idmap(text_start);
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end = virt_to_idmap(text_end);
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pr_info("Setting up static identity map for 0x%lx - 0x%lx\n", addr, end);
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prot |= PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AF;
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if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale_family())
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prot |= PMD_BIT4;
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pgd += pgd_index(addr);
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do {
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next = pgd_addr_end(addr, end);
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idmap_add_pud(pgd, addr, next, prot);
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} while (pgd++, addr = next, addr != end);
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}
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extern char __idmap_text_start[], __idmap_text_end[];
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static int __init init_static_idmap(void)
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{
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idmap_pgd = pgd_alloc(&init_mm);
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if (!idmap_pgd)
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return -ENOMEM;
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identity_mapping_add(idmap_pgd, __idmap_text_start,
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__idmap_text_end, 0);
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/* Flush L1 for the hardware to see this page table content */
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if (!(elf_hwcap & HWCAP_LPAE))
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flush_cache_louis();
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return 0;
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}
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early_initcall(init_static_idmap);
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/*
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* In order to soft-boot, we need to switch to a 1:1 mapping for the
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* cpu_reset functions. This will then ensure that we have predictable
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* results when turning off the mmu.
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*/
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void setup_mm_for_reboot(void)
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{
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/* Switch to the identity mapping. */
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cpu_switch_mm(idmap_pgd, &init_mm);
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local_flush_bp_all();
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#ifdef CONFIG_CPU_HAS_ASID
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/*
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* We don't have a clean ASID for the identity mapping, which
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* may clash with virtual addresses of the previous page tables
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* and therefore potentially in the TLB.
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*/
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local_flush_tlb_all();
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#endif
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}
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