271 lines
11 KiB
Plaintext
271 lines
11 KiB
Plaintext
The PCI Express Advanced Error Reporting Driver Guide HOWTO
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T. Long Nguyen <tom.l.nguyen@intel.com>
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Yanmin Zhang <yanmin.zhang@intel.com>
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07/29/2006
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1. Overview
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1.1 About this guide
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This guide describes the basics of the PCI Express Advanced Error
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Reporting (AER) driver and provides information on how to use it, as
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well as how to enable the drivers of endpoint devices to conform with
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PCI Express AER driver.
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1.2 Copyright (C) Intel Corporation 2006.
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1.3 What is the PCI Express AER Driver?
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PCI Express error signaling can occur on the PCI Express link itself
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or on behalf of transactions initiated on the link. PCI Express
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defines two error reporting paradigms: the baseline capability and
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the Advanced Error Reporting capability. The baseline capability is
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required of all PCI Express components providing a minimum defined
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set of error reporting requirements. Advanced Error Reporting
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capability is implemented with a PCI Express advanced error reporting
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extended capability structure providing more robust error reporting.
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The PCI Express AER driver provides the infrastructure to support PCI
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Express Advanced Error Reporting capability. The PCI Express AER
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driver provides three basic functions:
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- Gathers the comprehensive error information if errors occurred.
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- Reports error to the users.
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- Performs error recovery actions.
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AER driver only attaches root ports which support PCI-Express AER
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capability.
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2. User Guide
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2.1 Include the PCI Express AER Root Driver into the Linux Kernel
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The PCI Express AER Root driver is a Root Port service driver attached
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to the PCI Express Port Bus driver. If a user wants to use it, the driver
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has to be compiled. Option CONFIG_PCIEAER supports this capability. It
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depends on CONFIG_PCIEPORTBUS, so pls. set CONFIG_PCIEPORTBUS=y and
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CONFIG_PCIEAER = y.
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2.2 Load PCI Express AER Root Driver
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There is a case where a system has AER support in BIOS. Enabling the AER
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Root driver and having AER support in BIOS may result unpredictable
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behavior. To avoid this conflict, a successful load of the AER Root driver
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requires ACPI _OSC support in the BIOS to allow the AER Root driver to
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request for native control of AER. See the PCI FW 3.0 Specification for
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details regarding OSC usage. Currently, lots of firmwares don't provide
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_OSC support while they use PCI Express. To support such firmwares,
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forceload, a parameter of type bool, could enable AER to continue to
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be initiated although firmwares have no _OSC support. To enable the
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walkaround, pls. add aerdriver.forceload=y to kernel boot parameter line
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when booting kernel. Note that forceload=n by default.
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nosourceid, another parameter of type bool, can be used when broken
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hardware (mostly chipsets) has root ports that cannot obtain the reporting
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source ID. nosourceid=n by default.
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2.3 AER error output
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When a PCI-E AER error is captured, an error message will be outputed to
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console. If it's a correctable error, it is outputed as a warning.
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Otherwise, it is printed as an error. So users could choose different
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log level to filter out correctable error messages.
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Below shows an example:
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0000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID)
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0000:50:00.0: device [8086:0329] error status/mask=00100000/00000000
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0000:50:00.0: [20] Unsupported Request (First)
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0000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100
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In the example, 'Requester ID' means the ID of the device who sends
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the error message to root port. Pls. refer to pci express specs for
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other fields.
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3. Developer Guide
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To enable AER aware support requires a software driver to configure
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the AER capability structure within its device and to provide callbacks.
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To support AER better, developers need understand how AER does work
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firstly.
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PCI Express errors are classified into two types: correctable errors
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and uncorrectable errors. This classification is based on the impacts
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of those errors, which may result in degraded performance or function
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failure.
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Correctable errors pose no impacts on the functionality of the
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interface. The PCI Express protocol can recover without any software
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intervention or any loss of data. These errors are detected and
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corrected by hardware. Unlike correctable errors, uncorrectable
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errors impact functionality of the interface. Uncorrectable errors
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can cause a particular transaction or a particular PCI Express link
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to be unreliable. Depending on those error conditions, uncorrectable
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errors are further classified into non-fatal errors and fatal errors.
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Non-fatal errors cause the particular transaction to be unreliable,
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but the PCI Express link itself is fully functional. Fatal errors, on
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the other hand, cause the link to be unreliable.
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When AER is enabled, a PCI Express device will automatically send an
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error message to the PCIe root port above it when the device captures
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an error. The Root Port, upon receiving an error reporting message,
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internally processes and logs the error message in its PCI Express
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capability structure. Error information being logged includes storing
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the error reporting agent's requestor ID into the Error Source
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Identification Registers and setting the error bits of the Root Error
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Status Register accordingly. If AER error reporting is enabled in Root
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Error Command Register, the Root Port generates an interrupt if an
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error is detected.
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Note that the errors as described above are related to the PCI Express
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hierarchy and links. These errors do not include any device specific
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errors because device specific errors will still get sent directly to
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the device driver.
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3.1 Configure the AER capability structure
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AER aware drivers of PCI Express component need change the device
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control registers to enable AER. They also could change AER registers,
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including mask and severity registers. Helper function
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pci_enable_pcie_error_reporting could be used to enable AER. See
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section 3.3.
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3.2. Provide callbacks
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3.2.1 callback reset_link to reset pci express link
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This callback is used to reset the pci express physical link when a
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fatal error happens. The root port aer service driver provides a
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default reset_link function, but different upstream ports might
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have different specifications to reset pci express link, so all
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upstream ports should provide their own reset_link functions.
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In struct pcie_port_service_driver, a new pointer, reset_link, is
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added.
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pci_ers_result_t (*reset_link) (struct pci_dev *dev);
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Section 3.2.2.2 provides more detailed info on when to call
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reset_link.
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3.2.2 PCI error-recovery callbacks
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The PCI Express AER Root driver uses error callbacks to coordinate
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with downstream device drivers associated with a hierarchy in question
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when performing error recovery actions.
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Data struct pci_driver has a pointer, err_handler, to point to
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pci_error_handlers who consists of a couple of callback function
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pointers. AER driver follows the rules defined in
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pci-error-recovery.txt except pci express specific parts (e.g.
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reset_link). Pls. refer to pci-error-recovery.txt for detailed
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definitions of the callbacks.
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Below sections specify when to call the error callback functions.
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3.2.2.1 Correctable errors
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Correctable errors pose no impacts on the functionality of
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the interface. The PCI Express protocol can recover without any
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software intervention or any loss of data. These errors do not
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require any recovery actions. The AER driver clears the device's
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correctable error status register accordingly and logs these errors.
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3.2.2.2 Non-correctable (non-fatal and fatal) errors
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If an error message indicates a non-fatal error, performing link reset
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at upstream is not required. The AER driver calls error_detected(dev,
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pci_channel_io_normal) to all drivers associated within a hierarchy in
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question. for example,
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EndPoint<==>DownstreamPort B<==>UpstreamPort A<==>RootPort.
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If Upstream port A captures an AER error, the hierarchy consists of
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Downstream port B and EndPoint.
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A driver may return PCI_ERS_RESULT_CAN_RECOVER,
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PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on
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whether it can recover or the AER driver calls mmio_enabled as next.
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If an error message indicates a fatal error, kernel will broadcast
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error_detected(dev, pci_channel_io_frozen) to all drivers within
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a hierarchy in question. Then, performing link reset at upstream is
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necessary. As different kinds of devices might use different approaches
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to reset link, AER port service driver is required to provide the
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function to reset link. Firstly, kernel looks for if the upstream
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component has an aer driver. If it has, kernel uses the reset_link
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callback of the aer driver. If the upstream component has no aer driver
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and the port is downstream port, we will perform a hot reset as the
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default by setting the Secondary Bus Reset bit of the Bridge Control
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register associated with the downstream port. As for upstream ports,
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they should provide their own aer service drivers with reset_link
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function. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER and
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reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
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to mmio_enabled.
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3.3 helper functions
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3.3.1 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
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pci_enable_pcie_error_reporting enables the device to send error
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messages to root port when an error is detected. Note that devices
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don't enable the error reporting by default, so device drivers need
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call this function to enable it.
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3.3.2 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
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pci_disable_pcie_error_reporting disables the device to send error
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messages to root port when an error is detected.
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3.3.3 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
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pci_cleanup_aer_uncorrect_error_status cleanups the uncorrectable
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error status register.
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3.4 Frequent Asked Questions
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Q: What happens if a PCI Express device driver does not provide an
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error recovery handler (pci_driver->err_handler is equal to NULL)?
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A: The devices attached with the driver won't be recovered. If the
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error is fatal, kernel will print out warning messages. Please refer
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to section 3 for more information.
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Q: What happens if an upstream port service driver does not provide
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callback reset_link?
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A: Fatal error recovery will fail if the errors are reported by the
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upstream ports who are attached by the service driver.
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Q: How does this infrastructure deal with driver that is not PCI
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Express aware?
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A: This infrastructure calls the error callback functions of the
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driver when an error happens. But if the driver is not aware of
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PCI Express, the device might not report its own errors to root
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port.
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Q: What modifications will that driver need to make it compatible
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with the PCI Express AER Root driver?
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A: It could call the helper functions to enable AER in devices and
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cleanup uncorrectable status register. Pls. refer to section 3.3.
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4. Software error injection
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Debugging PCIe AER error recovery code is quite difficult because it
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is hard to trigger real hardware errors. Software based error
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injection can be used to fake various kinds of PCIe errors.
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First you should enable PCIe AER software error injection in kernel
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configuration, that is, following item should be in your .config.
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CONFIG_PCIEAER_INJECT=y or CONFIG_PCIEAER_INJECT=m
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After reboot with new kernel or insert the module, a device file named
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/dev/aer_inject should be created.
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Then, you need a user space tool named aer-inject, which can be gotten
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from:
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http://www.kernel.org/pub/linux/utils/pci/aer-inject/
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More information about aer-inject can be found in the document comes
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with its source code.
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