366 lines
8.6 KiB
Plaintext
366 lines
8.6 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config CSKY
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def_bool y
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select ARCH_32BIT_OFF_T
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select ARCH_HAS_DMA_PREP_COHERENT
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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select ARCH_INLINE_READ_LOCK if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
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select COMMON_CLK
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select CLKSRC_MMIO
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select CSKY_MPINTC if CPU_CK860
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select CSKY_MP_TIMER if CPU_CK860
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select CSKY_APB_INTC
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select DMA_DIRECT_REMAP
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select IRQ_DOMAIN
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select DW_APB_TIMER_OF
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select GENERIC_IOREMAP
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select GENERIC_LIB_ASHLDI3
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select GENERIC_LIB_ASHRDI3
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select GENERIC_LIB_LSHRDI3
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select GENERIC_LIB_MULDI3
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select GENERIC_LIB_CMPDI2
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select GENERIC_LIB_UCMPDI2
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select GENERIC_ALLOCATOR
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select GENERIC_ATOMIC64
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select GENERIC_CPU_DEVICES
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select GENERIC_IRQ_CHIP
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select GENERIC_IRQ_PROBE
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select GENERIC_IRQ_SHOW
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_SCHED_CLOCK
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_TIME_VSYSCALL
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select GENERIC_VDSO_32
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select GENERIC_GETTIMEOFDAY
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select GX6605S_TIMER if CPU_CK610
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select HAVE_ARCH_TRACEHOOK
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select HAVE_ARCH_AUDITSYSCALL
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select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
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select HAVE_ARCH_JUMP_LABEL_RELATIVE
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select HAVE_ARCH_MMAP_RND_BITS
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select HAVE_ARCH_SECCOMP_FILTER
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select HAVE_CONTEXT_TRACKING_USER
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select HAVE_VIRT_CPU_ACCOUNTING_GEN
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select HAVE_DEBUG_BUGVERBOSE
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DYNAMIC_FTRACE
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select HAVE_DYNAMIC_FTRACE_WITH_REGS
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select HAVE_GENERIC_VDSO
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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select HAVE_FUNCTION_ERROR_INJECTION
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select HAVE_FTRACE_MCOUNT_RECORD
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select HAVE_KERNEL_GZIP
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select HAVE_KERNEL_LZO
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select HAVE_KERNEL_LZMA
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select HAVE_KPROBES if !CPU_CK610
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select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
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select HAVE_KRETPROBES if !CPU_CK610
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_PERF_USER_STACK_DUMP
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select HAVE_DMA_CONTIGUOUS
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_RSEQ
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS
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select LOCK_MM_AND_FIND_VMA
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select MAY_HAVE_SPARSE_IRQ
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select MODULES_USE_ELF_RELA if MODULES
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select OF
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select OF_EARLY_FLATTREE
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select PERF_USE_VMALLOC if CPU_CK610
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select RTC_LIB
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select TIMER_OF
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select GENERIC_PCI_IOMAP
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select HAVE_PCI
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select PCI_DOMAINS_GENERIC if PCI
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select PCI_SYSCALL if PCI
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select PCI_MSI if PCI
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select TRACE_IRQFLAGS_SUPPORT
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config LOCKDEP_SUPPORT
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def_bool y
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config ARCH_SUPPORTS_UPROBES
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def_bool y if !CPU_CK610
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config CPU_HAS_CACHEV2
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bool
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config CPU_HAS_FPUV2
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bool
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config CPU_HAS_HILO
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bool
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config CPU_HAS_TLBI
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bool
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config CPU_HAS_LDSTEX
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bool
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help
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For SMP, CPU needs "ldex&stex" instructions for atomic operations.
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config CPU_NEED_TLBSYNC
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bool
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config CPU_NEED_SOFTALIGN
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bool
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config CPU_NO_USER_BKPT
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bool
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help
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For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
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abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
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So we need a 16bit instruction as user space bkpt, and it will cause an illegal
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instruction exception.
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In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config MMU
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def_bool y
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config STACKTRACE_SUPPORT
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def_bool y
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config TIME_LOW_RES
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def_bool y
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config CPU_TLB_SIZE
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int
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default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
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default "1024" if (CPU_CK860)
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config CPU_ASID_BITS
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int
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default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
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default "12" if (CPU_CK860)
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config L1_CACHE_SHIFT
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int
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default "4" if (CPU_CK610)
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default "5" if (CPU_CK807 || CPU_CK810)
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default "6" if (CPU_CK860)
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config ARCH_MMAP_RND_BITS_MIN
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default 8
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# max bits determined by the following formula:
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# VA_BITS - PAGE_SHIFT - 3
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config ARCH_MMAP_RND_BITS_MAX
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default 17
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menu "Processor type and features"
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choice
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prompt "CPU MODEL"
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default CPU_CK807
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config CPU_CK610
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bool "CSKY CPU ck610"
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select CPU_NEED_TLBSYNC
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select CPU_NEED_SOFTALIGN
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select CPU_NO_USER_BKPT
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config CPU_CK810
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bool "CSKY CPU ck810"
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select CPU_HAS_HILO
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select CPU_NEED_TLBSYNC
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config CPU_CK807
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bool "CSKY CPU ck807"
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select CPU_HAS_HILO
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config CPU_CK860
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bool "CSKY CPU ck860"
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select CPU_HAS_TLBI
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select CPU_HAS_CACHEV2
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select CPU_HAS_LDSTEX
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select CPU_HAS_FPUV2
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endchoice
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choice
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prompt "PAGE OFFSET"
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default PAGE_OFFSET_80000000
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config PAGE_OFFSET_80000000
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bool "PAGE OFFSET 2G (user:kernel = 2:2)"
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config PAGE_OFFSET_A0000000
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bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
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endchoice
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config PAGE_OFFSET
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hex
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default 0x80000000 if PAGE_OFFSET_80000000
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default 0xa0000000 if PAGE_OFFSET_A0000000
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choice
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prompt "C-SKY PMU type"
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depends on PERF_EVENTS
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depends on CPU_CK807 || CPU_CK810 || CPU_CK860
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config CPU_PMU_NONE
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bool "None"
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config CSKY_PMU_V1
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bool "Performance Monitoring Unit Ver.1"
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endchoice
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choice
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prompt "Power Manager Instruction (wait/doze/stop)"
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default CPU_PM_NONE
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config CPU_PM_NONE
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bool "None"
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config CPU_PM_WAIT
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bool "wait"
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config CPU_PM_DOZE
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bool "doze"
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config CPU_PM_STOP
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bool "stop"
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endchoice
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menuconfig HAVE_TCM
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bool "Tightly-Coupled/Sram Memory"
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depends on !COMPILE_TEST
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help
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The implementation are not only used by TCM (Tightly-Coupled Meory)
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but also used by sram on SOC bus. It follow existed linux tcm
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software interface, so that old tcm application codes could be
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re-used directly.
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if HAVE_TCM
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config ITCM_RAM_BASE
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hex "ITCM ram base"
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default 0xffffffff
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config ITCM_NR_PAGES
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int "Page count of ITCM size: NR*4KB"
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range 1 256
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default 32
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config HAVE_DTCM
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bool "DTCM Support"
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config DTCM_RAM_BASE
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hex "DTCM ram base"
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depends on HAVE_DTCM
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default 0xffffffff
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config DTCM_NR_PAGES
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int "Page count of DTCM size: NR*4KB"
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depends on HAVE_DTCM
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range 1 256
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default 32
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endif
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config CPU_HAS_VDSP
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bool "CPU has VDSP coprocessor"
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depends on CPU_HAS_FPU && CPU_HAS_FPUV2
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config CPU_HAS_FPU
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bool "CPU has FPU coprocessor"
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depends on CPU_CK807 || CPU_CK810 || CPU_CK860
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config CPU_HAS_ICACHE_INS
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bool "CPU has Icache invalidate instructions"
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depends on CPU_HAS_CACHEV2
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config CPU_HAS_TEE
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bool "CPU has Trusted Execution Environment"
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depends on CPU_CK810
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config SMP
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bool "Symmetric Multi-Processing (SMP) support for C-SKY"
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depends on CPU_CK860
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default n
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config NR_CPUS
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int "Maximum number of CPUs (2-32)"
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range 2 32
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depends on SMP
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default "4"
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config HIGHMEM
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bool "High Memory Support"
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depends on !CPU_CK610
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select KMAP_LOCAL
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default y
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config ARCH_FORCE_MAX_ORDER
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int "Maximum zone order"
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default "10"
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config DRAM_BASE
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hex "DRAM start addr (the same with memory-section in dts)"
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default 0x0
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config HOTPLUG_CPU
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bool "Support for hot-pluggable CPUs"
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select GENERIC_IRQ_MIGRATION
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depends on SMP
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help
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Say Y here to allow turning CPUs off and on. CPUs can be
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controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
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Say N if you want to disable CPU hotplug.
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config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
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bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
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depends on CPU_CK807 || CPU_CK810 || CPU_CK860
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help
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Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
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deal with unaligned access by hardware.
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endmenu
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source "arch/csky/Kconfig.platforms"
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source "kernel/Kconfig.hz"
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