230 lines
5.9 KiB
YAML
230 lines
5.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR MIT)
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# Copyright 2019 Linaro Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: QCOM SoC Temperature Sensor (TSENS)
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maintainers:
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- Amit Kucheria <amitk@kernel.org>
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description: |
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QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
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three distinct major versions of the IP that is supported by a single driver.
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The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
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everything before v1 when there was no versioning information.
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properties:
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compatible:
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oneOf:
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- description: msm8960 TSENS based
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items:
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- enum:
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- qcom,ipq8064-tsens
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- qcom,msm8960-tsens
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- description: v0.1 of TSENS
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items:
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- enum:
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- qcom,mdm9607-tsens
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- qcom,msm8916-tsens
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- qcom,msm8939-tsens
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- qcom,msm8974-tsens
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- const: qcom,tsens-v0_1
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- description: v1 of TSENS
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items:
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- enum:
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- qcom,msm8976-tsens
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- qcom,qcs404-tsens
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- const: qcom,tsens-v1
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- description: v2 of TSENS
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items:
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- enum:
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- qcom,msm8953-tsens
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- qcom,msm8996-tsens
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- qcom,msm8998-tsens
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- qcom,sc7180-tsens
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- qcom,sc7280-tsens
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- qcom,sc8180x-tsens
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- qcom,sc8280xp-tsens
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- qcom,sdm630-tsens
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- qcom,sdm845-tsens
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- qcom,sm6350-tsens
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- qcom,sm8150-tsens
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- qcom,sm8250-tsens
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- qcom,sm8350-tsens
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- const: qcom,tsens-v2
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reg:
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items:
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- description: TM registers
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- description: SROT registers
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interrupts:
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minItems: 1
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items:
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- description: Combined interrupt if upper or lower threshold crossed
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- description: Interrupt if critical threshold crossed
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interrupt-names:
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minItems: 1
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items:
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- const: uplow
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- const: critical
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nvmem-cells:
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minItems: 1
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maxItems: 2
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description:
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Reference to an nvmem node for the calibration data
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nvmem-cell-names:
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minItems: 1
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items:
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- const: calib
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- enum:
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- calib_backup
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- calib_sel
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"#qcom,sensors":
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description:
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Number of sensors enabled on this platform
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 16
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"#thermal-sensor-cells":
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const: 1
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description:
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Number of cells required to uniquely identify the thermal sensors. Since
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we have multiple sensors this is set to 1
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required:
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- compatible
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- interrupts
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- interrupt-names
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- "#thermal-sensor-cells"
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- "#qcom,sensors"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,ipq8064-tsens
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- qcom,mdm9607-tsens
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- qcom,msm8916-tsens
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- qcom,msm8960-tsens
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- qcom,msm8974-tsens
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- qcom,msm8976-tsens
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- qcom,qcs404-tsens
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- qcom,tsens-v0_1
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- qcom,tsens-v1
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then:
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properties:
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interrupts:
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maxItems: 1
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interrupt-names:
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maxItems: 1
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else:
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properties:
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interrupts:
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minItems: 2
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interrupt-names:
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minItems: 2
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,tsens-v0_1
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- qcom,tsens-v1
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- qcom,tsens-v2
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then:
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required:
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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// Example msm9860 based SoC (ipq8064):
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gcc: clock-controller {
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/* ... */
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tsens: thermal-sensor {
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compatible = "qcom,ipq8064-tsens";
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nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
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nvmem-cell-names = "calib", "calib_backup";
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interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow";
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#qcom,sensors = <11>;
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#thermal-sensor-cells = <1>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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// Example 1 (legacy: for pre v1 IP):
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tsens1: thermal-sensor@900000 {
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compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
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reg = <0x4a9000 0x1000>, /* TM */
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<0x4a8000 0x1000>; /* SROT */
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nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
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nvmem-cell-names = "calib", "calib_sel";
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow";
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#qcom,sensors = <5>;
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#thermal-sensor-cells = <1>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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// Example 2 (for any platform containing v1 of the TSENS IP):
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tsens2: thermal-sensor@4a9000 {
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compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
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reg = <0x004a9000 0x1000>, /* TM */
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<0x004a8000 0x1000>; /* SROT */
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nvmem-cells = <&tsens_caldata>;
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nvmem-cell-names = "calib";
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interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow";
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#qcom,sensors = <10>;
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#thermal-sensor-cells = <1>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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// Example 3 (for any platform containing v2 of the TSENS IP):
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tsens3: thermal-sensor@c263000 {
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compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
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reg = <0xc263000 0x1ff>,
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<0xc222000 0x1ff>;
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interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "uplow", "critical";
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#qcom,sensors = <13>;
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#thermal-sensor-cells = <1>;
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};
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...
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