83 lines
1.9 KiB
YAML
83 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra210 SoC External Memory Controller
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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description: |
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The EMC interfaces with the off-chip SDRAM to service the request stream
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sent from the memory controller.
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properties:
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compatible:
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const: nvidia,tegra210-emc
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reg:
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maxItems: 3
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clocks:
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items:
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- description: external memory clock
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clock-names:
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items:
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- const: emc
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interrupts:
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items:
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- description: EMC general interrupt
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memory-region:
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maxItems: 1
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description:
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phandle to a reserved memory region describing the table of EMC
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frequencies trained by the firmware
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nvidia,memory-controller:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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phandle of the memory controller node
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- nvidia,memory-controller
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/tegra210-car.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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emc_table: emc-table@83400000 {
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compatible = "nvidia,tegra210-emc-table";
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reg = <0x83400000 0x10000>;
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};
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};
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external-memory-controller@7001b000 {
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compatible = "nvidia,tegra210-emc";
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reg = <0x7001b000 0x1000>,
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<0x7001e000 0x1000>,
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<0x7001f000 0x1000>;
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clocks = <&tegra_car TEGRA210_CLK_EMC>;
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clock-names = "emc";
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interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&emc_table>;
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nvidia,memory-controller = <&mc>;
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};
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