183 lines
4.9 KiB
YAML
183 lines
4.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (c) 2020 MediaTek Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SMI (Smart Multimedia Interface) Common
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maintainers:
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- Yong Wu <yong.wu@mediatek.com>
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description: |
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The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
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MediaTek SMI have two generations of HW architecture, here is the list
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which generation the SoCs use:
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generation 1: mt2701 and mt7623.
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generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
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There's slight differences between the two SMI, for generation 2, the
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register which control the iommu port is at each larb's register base. But
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for generation 1, the register is at smi ao base(smi always on register
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base). Besides that, the smi async clock should be prepared and enabled for
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SMI generation 1 to transform the smi clock into emi clock domain, but that is
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not needed for SMI generation 2.
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt2701-smi-common
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- mediatek,mt2712-smi-common
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- mediatek,mt6779-smi-common
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- mediatek,mt6795-smi-common
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- mediatek,mt8167-smi-common
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- mediatek,mt8173-smi-common
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- mediatek,mt8183-smi-common
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- mediatek,mt8186-smi-common
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- mediatek,mt8188-smi-common-vdo
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- mediatek,mt8188-smi-common-vpp
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- mediatek,mt8192-smi-common
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- mediatek,mt8195-smi-common-vdo
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- mediatek,mt8195-smi-common-vpp
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- mediatek,mt8195-smi-sub-common
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- description: for mt7623
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items:
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- const: mediatek,mt7623-smi-common
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- const: mediatek,mt2701-smi-common
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reg:
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maxItems: 1
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power-domains:
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maxItems: 1
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clocks:
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description: |
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apb and smi are mandatory. the async is only for generation 1 smi HW.
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gals(global async local sync) also is optional, see below.
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minItems: 2
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items:
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- description: apb is Advanced Peripheral Bus clock, It's the clock for
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setting the register.
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- description: smi is the clock for transfer data and command.
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- description: Either asynchronous clock to help transform the smi clock
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into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
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- description: gals1 is the path1 clock of gals.
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clock-names:
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minItems: 2
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maxItems: 4
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mediatek,smi:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: a phandle to the smi-common node above. Only for sub-common.
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required:
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- compatible
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- reg
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- power-domains
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- clocks
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- clock-names
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allOf:
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- if: # only for gen1 HW
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properties:
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compatible:
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contains:
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enum:
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- mediatek,mt2701-smi-common
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then:
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: apb
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- const: smi
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- const: async
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- if: # only for sub common
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properties:
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compatible:
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contains:
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enum:
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- mediatek,mt8195-smi-sub-common
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then:
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required:
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- mediatek,smi
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properties:
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clocks:
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minItems: 3
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maxItems: 3
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clock-names:
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items:
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- const: apb
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- const: smi
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- const: gals0
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else:
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properties:
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mediatek,smi: false
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- if: # for gen2 HW that have gals
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properties:
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compatible:
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enum:
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- mediatek,mt6779-smi-common
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- mediatek,mt8183-smi-common
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- mediatek,mt8186-smi-common
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- mediatek,mt8192-smi-common
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- mediatek,mt8195-smi-common-vdo
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- mediatek,mt8195-smi-common-vpp
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then:
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properties:
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clocks:
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minItems: 4
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maxItems: 4
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clock-names:
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items:
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- const: apb
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- const: smi
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- const: gals0
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- const: gals1
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- if: # for gen2 HW that don't have gals
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properties:
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compatible:
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enum:
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- mediatek,mt2712-smi-common
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- mediatek,mt6795-smi-common
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- mediatek,mt8167-smi-common
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- mediatek,mt8173-smi-common
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: apb
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- const: smi
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additionalProperties: false
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examples:
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- |+
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/power/mt8173-power.h>
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smi_common: smi@14022000 {
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compatible = "mediatek,mt8173-smi-common";
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reg = <0x14022000 0x1000>;
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power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
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clocks = <&mmsys CLK_MM_SMI_COMMON>,
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<&mmsys CLK_MM_SMI_COMMON>;
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clock-names = "apb", "smi";
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};
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