Set up one spi_board_info array per controller and pass this to
at32_add_device_spi so that it can set up any GPIO pins for chip
selects based on this information.
Extracted from a patch by David Brownell and adapted slightly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Print a helpful warning along with a stack dump if clk_disable is
called on a already-disabled clock. Remove the BUG_ON().
Extracted from a patch by David Brownell.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Initialize the parent field of each generic clock by looking at the
PM registers. This means that the genclock operations can always
assume that the parent field is non-null, so they don't have to
check. Also remove a few unnecessary BUG_ON()s.
Extracted from a patch by David Brownell.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Move stuff in spi.c into ATSTK1002 board code and update SPI
platform device definitions according to the new GPIO API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.
It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
at32_reserve_pin() can be used for reserving portmux pins without
altering their configuration. Useful for e.g. SDRAM pins where we
really don't want to change the bootloader-provided configuration.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Leave the PIO lines as the bootloader left them. This allows us to
use PIOE without disturbing the SDRAM muxing.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Bugfixes for external irq handler set_irq_type():
- If set_irq_type() can't set the type, don't change anything!
- It's not OK to change the flow handler as part of set_irq_type(),
among other issues that violates spinlock rules. Instead, we can
call the relevant handler when we demux the external interrupts.
- The external irq demux has no need to grab the spinlock. And in
fact grabbing it that way was wrong, since that code might be
pre-empted by an irq at a different priority level, and that code
might then have tried to grab that spinlock...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Fixes to USART setup on the stk-1000 ... don't configure USART 2, since
its TXD/RXD are used for INT-A and INT-B buttons; and configure USART 0
(for IRDA, and with corrected IRQ) iff SW2 has a non-default setting.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
intc_get_pending() returns a bitmask with pending interrupts in a
interrupt controller group (irq). This is used by the upcoming
oprofile implementation for avr32 and may also be useful for chained
interrupt controller drivers.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Make sure that the flow handler for external interrupts is updated
whenever they type is changed. Also make sure that the defaults
correspond with how the interrupt controller is configured.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add platform_device definition and pio init code for the second
ethernet controller in AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Rename portmux_set_func to at32_select_periph, add at32_select_gpio
and add flags parameter to specify the initial state of the pins.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The read[bwl] and write[bwl] functions are meant for accessing PCI
devices. How this is achieved on AVR32 is unknown, as there are no
systems with a PCI bridge available yet.
On-chip peripheral access, however, should not depend on how we end
up implementing PCI access, so using __raw_read[bwl]/__raw_write[bwl]
is the right thing to do for on-chip peripherals. This patch converts
the drivers for the static memory controller, interrupt controller,
PIO controller and system manager to use __raw MMIO access.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Make the necessary changes to AVR32 required by the irq regs stuff.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Allow the board to remap actual USART peripheral devices to serial
devices by calling at32_map_usart(hw_id, serial_line). This ensures
that even though ATSTK1002 uses USART1 as the first serial port, it
will still have a ttyS0 device.
This also adds a board-specific early setup hook and moves the
at32_setup_serial_console() call there from the platform code.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
In order to initialize the serial console early, the atmel_serial
driver had to do a hack where it compared the physical address of the
port with an address known to be permanently mapped, and used it as a
virtual address. This got around the limitation that ioremap() isn't
always available when the console is being initalized.
This patch removes that hack and replaces it with a new "regs" field
in struct atmel_uart_data that the board-specific code can initialize
to a fixed virtual mapping for platform devices where this is possible.
It also initializes the DBGU's regs field with the address the driver
used to check against.
On AVR32, the "regs" field is initialized from the physical base
address when this it can be accessed through a permanently 1:1 mapped
segment, i.e. the P4 segment.
If regs is NULL, the console initialization is delayed until the "real"
driver is up and running and ioremap() can be used.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patchset adds the necessary drivers and infrastructure to access the
external flash on the ATSTK1000 board through the MTD subsystem. With this
stuff in place, it will be possible to use a jffs2 filesystem stored in the
external flash as a root filesystem. It might also be possible to update the
boot loader if you drop the write protection of partition 0.
As suggested by David Woodhouse, I reworked the patches to use the physmap
driver instead of introducing a separate mapping driver for the ATSTK1000.
I've also cleaned up the hsmc header by removing useless comments and
converting spaces to tabs (my headerfile generator needs some work.)
Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the
erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup
instead.
This patch:
This adds a simple API for configuring the static memory controller along with
an implementation for the Atmel HSMC.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Haavard Skinnemoen